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Xilinx / Sdsoc_examples

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SDSoC Example Repository

Note: Please do not use this repository for Xilinx Latest Vitis Tool Chain. A entire new Repository is created here: https://github.com/Xilinx/Vitis_Accel_Examples for Xilinx new Vitis Tool chain. Use SDSoC Examples Git Repository only for Xilinx previously released product SDSoC.

Welcome to the SDSoC example repository. This repository contains the latest examples to get you started with application optimization targeting Xilinx Embedded FPGA acceleration boards. All the examples are ready to be compiled and executed on boards. These examples are developed in C/C++ flow. The "cpp" directory of this repository contains SDSoC examples in C/C++ form.

This repository is organized as follows internally.

  1. CPP
  2. OCL
  3. LIBS
  4. UTILITY
  5. OTHER INFORMATION
  6. SUPPORT
  7. REVISION HISTORY

1. CPP

Collection of examples geared at teaching the user best practices in how to use different features of SDSoC (C/C++) and start on their own application.

2. OCL

Collection of examples geared at teaching the user best practices in how to use different features of OpenCL and start on their own application for OpenCL Unified Platform.

3. LIBS

Collection of common libraries used across all examples to assist in the quick development of source code which is not targeted to programmable logic (PL).

4. UTILITY

Collection of utility functions used as part of the Makefiles in all of the examples. This set includes Makefile rules and scripts to launch SDSoC compiled applications onto SDSoC emulation flow. It also contains Makefile and Readme generation scripts.

5. OTHER INFORMATION

For more information check here: SDSoC User Guides

6. SUPPORT

For questions and to get help on this project or your own projects, visit the SDSoC Forums.

7. REVISION HISTORY

Date Readme Version Revision Description
JUNE2017 1.0 Initial Xilinx release
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