Frameworks and methodologies Coroutine Co-simulation Test Bench (cocotb) Open Source VHDL Verification Methodology (OSVVM) SVUnit Universal VHDL Verification Methodology (UVVM) VUnit Simulators/compilers GHDL Icarus Verilog (iverilog) Verilator Yosys/CXXRTL Proofs of concept pyCAPI Open Source VHDL Design Explorer (OSVDE)
