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All Projects → intel → systemc-compiler

intel / systemc-compiler

Licence: other
This tool translates synthesizable SystemC code to synthesizable SystemVerilog.

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hlsllvmclanghardware-designssystemc

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Intel® Compiler for SystemC*

*Other names and brands may be claimed as the property of others.

Introduction

Intel® Compiler for SystemC* (ICSC) translates synthesizable SystemC design to synthesizable SystemVerilog design.

ICSC supports SystemC synthesizable subset in method and thread processes and arbitrary C++ code in module constructors. The tool produces human-readable SystemVerilog for complex multi-module designs in tens of seconds. ICSC performs design checks to detect non-synthesizable code and common coding mistakes.

ICSC generates SystemVerilog (IEEE 1800-2017) code. To convert SystemVerilog to Verilog (IEEE 1364-2005) there is SV2V tool which is compatible with ICSC.

See more information at Intel Compiler for SystemC wiki.

License

ICSC is distributed under the Apache License v2.0 with LLVM Exceptions.

Getting started

ICSC is based on Clang/LLVM frontend and can be installed at most Linux OS. There is install.sh script that downloads and builds ICSC and the required dependecies at Ubuntu 20.04.

An instruction how to install and run ISCS is given at Getting started.

Documentation

User guide document describes installation procedure, run tool options, preparation of SystemC design for ICSC, and also tool extensions and advanced verification features.

ICSC mostly supports SystemC Synthesizable Subset. Details of SystemC/C++ subset supported are described at SystemC/C++ supported.

Publications

Help

To get help please submit your question or issue.

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