remote refocusA scientific publication, describing a way to improve microscopy. This repository hosts everything you need to reproduce our results. Read the publication here: https://andrewgyork.github.io/remote_refocus/
CryptoHDLA list of VHDL codes implementing cryptographic algorithms
ruby-vpiRuby interface to IEEE 1364-2005 Verilog VPI
aciduinoCheap and DIY make in 1 hour, 2 tracks, 14 patterns, Roland TB-303 step sequencer clone +plus features aimed for musicians and djs to use it on live performance or for the studio create process
muniaMulti-use Nintendo Input Adapter
RiscvSpecFormalThe RiscvSpecKami package provides SiFive's RISC-V processor model. Built using Coq, this processor model can be used for simulation, model checking, and semantics analysis. The RISC-V processor model can be output as Verilog and simulated/synthesized using standard Verilog tools.
stonneSTONNE: A Simulation Tool for Neural Networks Engines
systemc-compilerThis tool translates synthesizable SystemC code to synthesizable SystemVerilog.
spydrnetA flexible framework for analyzing and transforming FPGA netlists. Official repository.