All Projects → YoWASP → yosys

YoWASP / yosys

Licence: ISC license
Unofficial Yosys WebAssembly packages

Programming Languages

c
50402 projects - #5 most used programming language
python
139335 projects - #7 most used programming language
shell
77523 projects

Projects that are alternatives of or similar to yosys

sphinxcontrib-hdl-diagrams
Sphinx Extension which generates various types of diagrams from Verilog code.
Stars: ✭ 37 (+27.59%)
Mutual labels:  fpga, yosys
cariboulite
CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR
Stars: ✭ 785 (+2606.9%)
Mutual labels:  fpga, yosys
risc8
Mostly AVR compatible FPGA soft-core
Stars: ✭ 19 (-34.48%)
Mutual labels:  fpga, yosys
cnn open
A hardware implementation of CNN, written by Verilog and synthesized on FPGA
Stars: ✭ 157 (+441.38%)
Mutual labels:  fpga
fasm
FPGA Assembly (FASM) Parser and Generator
Stars: ✭ 69 (+137.93%)
Mutual labels:  fpga
pypi-simple
PyPI Simple Repository API client library
Stars: ✭ 21 (-27.59%)
Mutual labels:  pypi
termtables
🖥️ Pretty tables in the terminal
Stars: ✭ 85 (+193.1%)
Mutual labels:  pypi
caipyra
import caipyra module code
Stars: ✭ 25 (-13.79%)
Mutual labels:  pypi
habitipy
Command-line interface to Habitica
Stars: ✭ 47 (+62.07%)
Mutual labels:  pypi
SneakySnake
SneakySnake🐍 is the first and the only pre-alignment filtering algorithm that works efficiently and fast on modern CPU, FPGA, and GPU architectures. It greatly (by more than two orders of magnitude) expedites sequence alignment calculation for both short and long reads. Described in the Bioinformatics (2020) by Alser et al. https://arxiv.org/abs…
Stars: ✭ 44 (+51.72%)
Mutual labels:  fpga
spu32
Small Processing Unit 32: A compact RV32I CPU written in Verilog
Stars: ✭ 51 (+75.86%)
Mutual labels:  fpga
virtio
Virtio implementation in SystemVerilog
Stars: ✭ 38 (+31.03%)
Mutual labels:  fpga
quasiSoC
No-MMU Linux capable RISC-V SoC designed to be useful.
Stars: ✭ 29 (+0%)
Mutual labels:  fpga
hlsclt
A Vivado HLS Command Line Helper Tool
Stars: ✭ 35 (+20.69%)
Mutual labels:  fpga
gateware-ts
Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools
Stars: ✭ 83 (+186.21%)
Mutual labels:  fpga
icebreaker-amaranth-examples
This repository contains iCEBreaker examples for Amaranth HDL.
Stars: ✭ 26 (-10.34%)
Mutual labels:  fpga
pypi-command-line
A powerful, colorful, beautiful command-line-interface for pypi.org
Stars: ✭ 32 (+10.34%)
Mutual labels:  pypi
riscv-cores-list
RISC-V Cores, SoC platforms and SoCs
Stars: ✭ 651 (+2144.83%)
Mutual labels:  fpga
ios2androidres
Copy iOS image resources to their appropriate Android directory
Stars: ✭ 20 (-31.03%)
Mutual labels:  pypi
vhdl-hdmi-out
HDMI Out VHDL code for 7-series Xilinx FPGAs
Stars: ✭ 36 (+24.14%)
Mutual labels:  fpga

YoWASP Yosys packages

This package provides Yosys binaries built for WebAssembly. See the overview of the YoWASP project for details.

Building

The primary build environment for this repository is the ubuntu-latest GitHub CI runner; packages are built on every push and automatically published from the release branch to PyPI.

To reduce maintenance overhead, the only development environment we will support for this repository is x86_64 Linux.

License

This package is covered by the ISC license, which is the same as the Yosys license.

Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].