All Projects → platformio → platform-lattice_ice40

platformio / platform-lattice_ice40

Licence: Apache-2.0 license
Lattice iCE40: development platform for PlatformIO

Programming Languages

python
139335 projects - #7 most used programming language

Projects that are alternatives of or similar to platform-lattice ice40

verifla
Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm
Stars: ✭ 21 (-38.24%)
Mutual labels:  fpga, verilog, icestorm, lattice
spu32
Small Processing Unit 32: A compact RV32I CPU written in Verilog
Stars: ✭ 51 (+50%)
Mutual labels:  fpga, verilog, icestorm
shapool-core
FPGA core for SHA256d mining targeting Lattice iCE40 devices.
Stars: ✭ 19 (-44.12%)
Mutual labels:  fpga, verilog, icestorm
fpga-docker
Tools for running FPGA vendor toolchains with Docker
Stars: ✭ 54 (+58.82%)
Mutual labels:  fpga, verilog, lattice
Platformio Core
PlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!
Stars: ✭ 5,539 (+16191.18%)
Mutual labels:  fpga, platformio, verilog
1bitSDR
Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom
Stars: ✭ 53 (+55.88%)
Mutual labels:  fpga, verilog, lattice
Platformio Atom Ide
PlatformIO IDE for Atom: The next generation integrated development environment for IoT
Stars: ✭ 475 (+1297.06%)
Mutual labels:  fpga, platformio, verilog
Platformio Vscode Ide
PlatformIO IDE for VSCode: The next generation integrated development environment for IoT
Stars: ✭ 676 (+1888.24%)
Mutual labels:  fpga, platformio, verilog
xeda
Cross EDA Abstraction and Automation
Stars: ✭ 25 (-26.47%)
Mutual labels:  fpga, verilog
Biriscv
32-bit Superscalar RISC-V CPU
Stars: ✭ 208 (+511.76%)
Mutual labels:  fpga, verilog
Basic verilog
Must-have verilog systemverilog modules
Stars: ✭ 247 (+626.47%)
Mutual labels:  fpga, verilog
Red Pitaya Notes
Notes on the Red Pitaya Open Source Instrument
Stars: ✭ 205 (+502.94%)
Mutual labels:  fpga, verilog
Verilog Generator Of Neural Net Digit Detector For Fpga
Verilog Generator of Neural Net Digit Detector for FPGA
Stars: ✭ 187 (+450%)
Mutual labels:  fpga, verilog
Convolution network on fpga
CNN acceleration on virtex-7 FPGA with verilog HDL
Stars: ✭ 236 (+594.12%)
Mutual labels:  fpga, verilog
Openwifi Hw
FPGA/hardware design of openwifi
Stars: ✭ 181 (+432.35%)
Mutual labels:  fpga, verilog
Wb2axip
Bus bridges and other odds and ends
Stars: ✭ 177 (+420.59%)
Mutual labels:  fpga, verilog
SpinalDev
Docker Development Environment for SpinalHDL
Stars: ✭ 17 (-50%)
Mutual labels:  fpga, verilog
platform-shakti
Shakti: development platform for PlatformIO
Stars: ✭ 26 (-23.53%)
Mutual labels:  platformio, platformio-platform
kianRiscV
KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....
Stars: ✭ 167 (+391.18%)
Mutual labels:  fpga, verilog
FPGA ThreeLevelStorage
【原创,已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计,FPGA三级存储子系统。
Stars: ✭ 86 (+152.94%)
Mutual labels:  fpga, verilog

Lattice iCE40: development platform for PlatformIO

Build Status

Lattice iCE40 are the first FPGAs fully usable by open source tools.

  • Home (home page in the PlatformIO Registry)
  • Documentation (advanced usage, packages, boards, frameworks, etc.)

Usage

  1. Install PlatformIO
  2. Create PlatformIO project and configure a platform option in platformio.ini file:

Stable version

[env:stable]
platform = lattice_ice40
board = ...
...

Development version

[env:development]
platform = https://github.com/platformio/platform-lattice_ice40.git
board = ...
...

Configuration

Please navigate to documentation.

Credits

Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].