All Projects → Domipheus → Tpu

Domipheus / Tpu

TPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. Designed to run on miniSpartan6+.

Labels

Projects that are alternatives of or similar to Tpu

Fpga Fft
A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
Stars: ✭ 45 (-50.55%)
Mutual labels:  vhdl
Logi Projects
Stars: ✭ 63 (-30.77%)
Mutual labels:  vhdl
Pynq Dl
Xilinx Deep Learning IP
Stars: ✭ 84 (-7.69%)
Mutual labels:  vhdl
Vexriscv
A FPGA friendly 32 bit RISC-V CPU implementation
Stars: ✭ 1,041 (+1043.96%)
Mutual labels:  vhdl
Sublime Vhdl
VHDL Package for Sublime Text
Stars: ✭ 58 (-36.26%)
Mutual labels:  vhdl
Yafc
Yet Another Forth Core...
Stars: ✭ 68 (-25.27%)
Mutual labels:  vhdl
Vhdl
VHDL Samples
Stars: ✭ 40 (-56.04%)
Mutual labels:  vhdl
Ghdl
VHDL 2008/93/87 simulator
Stars: ✭ 1,285 (+1312.09%)
Mutual labels:  vhdl
Q27
27-Queens Puzzle: Massively Parellel Enumeration and Solution Counting
Stars: ✭ 60 (-34.07%)
Mutual labels:  vhdl
Zynqbtc
A Bitcoin miner for the Zynq chip utilizing the Zedboard.
Stars: ✭ 74 (-18.68%)
Mutual labels:  vhdl
Spi Fpga
SPI master and slave for FPGA written in VHDL
Stars: ✭ 50 (-45.05%)
Mutual labels:  vhdl
Haddoc2
Caffe to VHDL
Stars: ✭ 57 (-37.36%)
Mutual labels:  vhdl
Digital Design Lab
Stars: ✭ 74 (-18.68%)
Mutual labels:  vhdl
Reonv
ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 architecture, now changed to RISC-V ISA.
Stars: ✭ 47 (-48.35%)
Mutual labels:  vhdl
Greta
GRETA expansion board for the Amiga 500 computer with Fast RAM, microSD mass storage and Ethernet controller, powered by FPGA technology.
Stars: ✭ 84 (-7.69%)
Mutual labels:  vhdl
Scaffold
Donjon hardware tool for circuits security evaluation
Stars: ✭ 43 (-52.75%)
Mutual labels:  vhdl
J1sc
A reimplementation of a tiny stack CPU
Stars: ✭ 64 (-29.67%)
Mutual labels:  vhdl
Freezing Spice
A pipelined RISCV implementation in VHDL
Stars: ✭ 90 (-1.1%)
Mutual labels:  vhdl
Patmos
Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project
Stars: ✭ 85 (-6.59%)
Mutual labels:  vhdl
Simon speck ciphers
Implementations of the Simon and Speck Block Ciphers
Stars: ✭ 74 (-18.68%)
Mutual labels:  vhdl

TPU

TPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. Designed to run on miniSpartan6+.

Some code in vhdl/top and vhdl/dvid is not owned by myself. Please refer to those files for information.

This is implemented with ISE Webpack (The free Xilinx tools) however the project is not committed here - yet.

This is the implementation being written about over at http://labs.domipheus.com/blog/category/projects/tpu/

Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].