137 Open source projects that are alternatives of or similar to FreeRTOS-RISCV

Nuclei RISC-V Software Development Kit

Universal Cooperative Multithread Lib with real time Scheduler that was designed to work, virtually, into any modern micro controller or Microchip and, also, for user space applications for modern OS (Mac, Linux, Windows) or on FreeRTOS as well. Supports C and C++

PlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!

LicheeTang 蜂鸟E203 Core

RISC-V CPU Core

Rust crate for FreeRTOS

Mobile operating system based on FreeRTOS™ optimized for E Ink displays - developed for Mudita Pure minimalist phone

OpenEmbedded/Yocto layer for RISC-V Architecture

Embedded graphical interface for PID control

v3.5 https://rcore-os.github.io/rCore-Tutorial-Book-v3/

RISC-V Instruction Set Simulator (Built for education).

A simple RISC-V processor for use in FPGA designs.

Sample blinky project for PlatformIO using libopencm3 and FreeRTOS

GD32V: development platform for PlatformIO

Firmware for Pinetime smartwatch written in C/C++ and based on FreeRTOS

All CPU and MCU documentation in one place

mTower is Trusted Execution Environment specially designed to be used on MicroController Units (MCUs) supporting ARM TrustZone technology (e.g., Cortex-M23/33/35p). mTower operates well under restrictions typical for such environment – small RAM and ROM sizes, relatively low performance, absence of rich OSes providing variety of services availab…

A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.

Shakti: development platform for PlatformIO

Compact FPGA game console

POSIX based FreeRTOS emulator with SDL2 graphics interface and multiple async communications interfaces, aiming to make it possible to teach FreeRTOS without embedded hardware using similar processes

IoT Communications Module for Energy Access. An easy way to get production ready, bi-directional communications for your IoT embedded device. Proiect supported by the EnAccess Foundation - https://enaccess.org

TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems

32-bit RISC-V system on chip for iCE40 and ECP5 FPGAs

Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Where Lions Roam: RISC-V on the VELDT

stm32f10x gcc makefile freertos

F# RISC-V Instruction Set formal specification

canonical libwebsockets.org networking library

🖥️ An xv6-like operating system on RISC-V with multi-core support. Documentation available online.

STM32 Base project with a lot of stuff

This repository hosts the project for open-source hummingbird E203 RISC processor Core.

一个志在实现STM32F1、F2和F4工程模板的项目，集成了FreeRTOS、LWIP、FATFS、DSP、USB、IAP、菜单库、有限状态机模板等等的组件，以及未来将加入的加密、BPNN、最小二乘、音频图片视频解码、LittlevGL等诸多常用的算法或组件，并具有良好的易用性、解耦性和可剪裁性！

C++17 RISC-V RV32GC / RV64GC userspace emulator library

Mirror; Work-in-progress software-rendering Vulkan implementation

Featherweight RISC-V implementation

A lightweight, secure, multiprocessor bare-metal hypervisor written in Rust for RISC-V

Real Time Operating System Lessons using Arduino and The FreeRTOS Kernel

RISC-V instruction set simulator built for education

This library gives an example of how to get FreeRTOS running on Seeed production. The project can be used as a template to build your projects off of as well.

Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink

Open source graphics operating system for microcontroller

BL602 SDK. Any technical topic, please access the following link.

Modbus TCP and RTU, Master and Slave for STM32 using Cube HAL and FreeRTOS

SweRV EL2 Core

On-Board Data Handling Module 2

FPGA-based RISC-V CPU+SoC.

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs

Kendryte K210: development platform for PlatformIO

Pub/Sub library for C

MicroPython for K210 RISC-V, let's play with edge AI easier

为推广RISC-V尽些薄力

Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator used in FireSim.

Lightweight, easy-to-use wrapper around the Arduino_FreeRTOS_Library

A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz

Simple and lightweight source-based multi-platform Linux distribution with musl libc.

Alphanumeric+1 shellcoding tools for RISC-V

Open source firmware for MMC controllers

32-bit Superscalar RISC-V CPU