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→ SystemRDL
3 open source projects by SystemRDL
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1.
Systemrdl Compiler
SystemRDL 2.0 language compiler front-end
✭ 95
python
fpga
eda
asic
2.
PeakRDL-uvm
Generate UVM register model from compiled SystemRDL input
✭ 25
python
SystemVerilog
shell
asic
fpga
eda
uvm
registers
uvm-ral-model
uvm-register-model
3.
PeakRDL-ipxact
Import and export IP-XACT XML register models
✭ 21
python
shell
asic
fpga
eda
ip-xact
register-descriptions
systemrdl-compiler
ipxact
1-3
of
3
user projects