GitPlanet

Cheap and reliable Node.js hosting starts at $3/month, and $1/month static HTML hosting

Created with love in Canada, visit hostnodejs.com today

Feel like to post an Ad? Learn Details
All Projects → mattvenn → basic-ecp5-pcb

mattvenn / basic-ecp5-pcb

Licence: CC0-1.0 license
Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs

Programming Languages

Verilog
626 projects
Makefile
30231 projects

Labels

fpgahardwarepcb

Projects that are alternatives of or similar to basic-ecp5-pcb

iceskate
A low cost FPGA development board for absolute newbies
Stars: ✭ 15 (-78.87%)
Mutual labels:  fpga, hardware, pcb
Nyuziprocessor
GPGPU microprocessor architecture
Stars: ✭ 1,351 (+1802.82%)
Mutual labels:  fpga, hardware
Kactus2dev
Kactus2 is a graphical EDA tool based on the IP-XACT standard.
Stars: ✭ 82 (+15.49%)
Mutual labels:  fpga, hardware
Neorv32
A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.
Stars: ✭ 106 (+49.3%)
Mutual labels:  fpga, hardware
Electron
A mixed signal netlist language (pre-alpha)
Stars: ✭ 52 (-26.76%)
Mutual labels:  fpga, pcb
Haddoc2
Caffe to VHDL
Stars: ✭ 57 (-19.72%)
Mutual labels:  fpga, hardware
Riscboy
Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink
Stars: ✭ 103 (+45.07%)
Mutual labels:  fpga, pcb
Platformio Atom Ide
PlatformIO IDE for Atom: The next generation integrated development environment for IoT
Stars: ✭ 475 (+569.01%)
Mutual labels:  fpga, hardware
Vna
a simple and cheap vector network analyzer, including support software
Stars: ✭ 121 (+70.42%)
Mutual labels:  fpga, pcb
Openfpgaduino
All open source file and project for OpenFPGAduino project
Stars: ✭ 137 (+92.96%)
Mutual labels:  fpga, hardware
Axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Stars: ✭ 227 (+219.72%)
Mutual labels:  fpga, hardware
Tenyr
Simple, orthogonal 32-bit computer architecture and environment
Stars: ✭ 24 (-66.2%)
Mutual labels:  fpga, hardware
Pipecnn
An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
Stars: ✭ 775 (+991.55%)
Mutual labels:  fpga, hardware
Echomods
Open source ultrasound processing modules and building blocks
Stars: ✭ 200 (+181.69%)
Mutual labels:  fpga, hardware
Platformio Vscode Ide
PlatformIO IDE for VSCode: The next generation integrated development environment for IoT
Stars: ✭ 676 (+852.11%)
Mutual labels:  fpga, hardware
Glasgow
Scots Army Knife for electronics
Stars: ✭ 1,374 (+1835.21%)
Mutual labels:  fpga, hardware
Hastlayer Sdk
Turning .NET assemblies into FPGA hardware for faster execution and lower power usage. See the Readme and https://hastlayer.com.
Stars: ✭ 226 (+218.31%)
Mutual labels:  fpga, hardware
Cascade
A Just-In-Time Compiler for Verilog from VMware Research
Stars: ✭ 413 (+481.69%)
Mutual labels:  fpga, hardware
Firesim
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
Stars: ✭ 415 (+484.51%)
Mutual labels:  fpga, hardware
Connectal
Connectal is a framework for software-driven hardware development.
Stars: ✭ 117 (+64.79%)
Mutual labels:  fpga, hardware
View All Similar Projects ➔

ECP5 FPGA dev board

  • Make an ECP5 FPGA dev board
  • Keep it super simple and cheap
  • Configured by on-board FLASH or direct with a Raspberry Pi
  • 6 PMODs, 2 buttons, 2 LEDs, FLASH for configuration bitstreams.
  • buttons are active low, LEDs are active low.

There is also an iCE40 version of this board: https://github.com/mattvenn/first-fpga-pcb

What a Lattice ecp5 FPGA needs

Check ECP5 family datasheet for more information.

  • A clock input. Has to be provided by an oscillator, it doesn't have a crystal driver. Has to go to a PCLK pad
  • 1.1v core supply for the internal logic. Should supply at least 600mA
  • 2.5v auxiliary power supply. Should supply 10mA
  • 3.3v IO supply for the IO pins. In this design, all banks of IO have the same supply. Same PSU is used for all PMODs, and is rated at 1A.
  • Get configured over SPI interface. This can be done directly by a microcontroller or a computer, or the bitstream can be programmed into some FLASH, and the FPGA will read it at boot. If FLASH isn't provided then the bitstream needs to be programmed at every power up or configuration reset. See sysconfig documentation for more info.
  • Decoupling capacitors for each IO bank.

PCB

board

BOM

  • FPGA ecp5 12k (LFE5U-12F-6BG256C) or 45k (LFE5U-45F-6BG256C) part, 14mm bga with 256 pins, 0.8mm pitch
  • 2 x TLV62568 DC/DC switchers for core (1.1v) and IO (3.3v).
  • 2.5v reg TLV73325PDBVT
  • 16MHz oscillator SIT2001BI-S2-33N-16.000000G
  • 16MB FLASH W25Q128JVSIM (same as icebreaker)

Design Review

  • core supply (1.1v) is now DC/DC for 1A using TLV62568
  • pmod and IO supply is now DC/DC for 1A using TLV62568
  • move ferrite beads to input side of psu
  • pullups on io2/3 of flash
  • pulldown on tclk of jtag
  • fix vias under bga by moving to 0.25mm drill 0.45mm annular ring
  • add more ground vias under BGA

Errata

  • Add missing qspi to the Pi to be able to program bitstream faster.
  • configuration bits for FPGA should be tied to gnd not through a 10k resistor. The voltage is about 1v, so might be a little close to the threshold of the 3.3v IOBANK supply. Replace with 0Ohm resistors? Or just tie to gnd?
  • used IS25LP016D-JBLE as flash, but it has problems with enabling QE for QSPI. Relace with the model used on icebreaker
  • ecp5 SPI clock pin can't be used as an input, so have to add a bodge wire for SPI peripheral comms with Pi. See the test-spi-clk-in branch for a workaround.

RPi connection info

See test/mv_ecp.lpf for FPGA pinning. The following are the physical pins on the raspberry pi:

  • serial: TX, RX on pins 8 and 10
  • I2C: bitbanged on pins 38 and 40. Optional pullup resistors R1 & R2. Need to set up in boot/config.txt
  • GPIOs: pins 31, 32, 33, 36.
  • SPI: SDO, SDI, CLK, CE0 on pins 19, 21, 23, 24. These are connected to the onboard FLASH for bitstream config.
  • Extra SPI CE1: pin 26

RPi Gotchas

  • fomu_flash will leave the SPI device in an unusable state. Run sudo rmmod spi_bcm2835 && sudo modprobe spi_bcm2835 to reset it.
  • connected I2C pins are just GPIOs. I have found the Pi's I2C hardware unusable, so always use the slower bitbanged version. To enable add this to /boot/config.txt: dtoverlay=i2c-gpio,i2c_gpio_sda=21,i2c_gpio_scl=20,i2c_gpio_delay_us=8,bus=3

Test:

Simple test connects buttons to LEDs and toggles all other pins every second.

Yosys and NextPNR are used to create the bitstream and then it's copied to the Raspberry Pi specified by PI_ADDR in the Makefile.

Fomu-Flash is used to flash the SPI memory. Clone the repo on the Pi and set the path in the Makefile with FOMU_FLASH.

Run make in ./test to build, copy and program the bitstream.

PicoRV32 PicoSoC

I have adapted Claire Wolf's PicoRV32 Picosoc for this board: https://github.com/mattvenn/picorv32/tree/ecp5/picosoc

Reference

Inspiration

Attribution

License

Open Source Hardware

This board is an OSHWA approved design: ES000012

Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].