dockerScripts to build and use docker images including GHDL
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Mutual labels: hardware, simulation, vhdl, synthesis
OsvvmOSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...
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Mutual labels: simulation, vhdl, verification
EdalizeAn abstraction library for interfacing EDA tools
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Mutual labels: simulation, vhdl, synthesis
Awesome Open Hardware VerificationA List of Free and Open Source Hardware Verification Tools and Frameworks
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xedaCross EDA Abstraction and Automation
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Mutual labels: hardware, vhdl, synthesis
JSON-for-VHDLA JSON library implemented in VHDL.
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Mutual labels: simulation, vhdl, synthesis
pyarch🔌 Hardware Abstraction Library in Python
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Mutual labels: hardware, vhdl
lewisLet's write intricate simulators!
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Mutual labels: hardware, simulation
FiresimFireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
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GhdlVHDL 2008/93/87 simulator
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Mutual labels: hardware, vhdl
Haddoc2Caffe to VHDL
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Mutual labels: hardware, vhdl
Neorv32A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.
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Mutual labels: hardware, vhdl
UnimidiRealtime MIDI IO for Ruby
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herbieOptimize floating-point expressions for accuracy
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HalHAL – The Hardware Analyzer
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Mutual labels: hardware, vhdl
LivehdLive Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation
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Mutual labels: simulation, synthesis
Cocotbcocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
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Mutual labels: vhdl, verification
ruby-vpiRuby interface to IEEE 1364-2005 Verilog VPI
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Mutual labels: simulation, verification
Space Invaders VhdlSpace Invaders game implemented with VHDL
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Mutual labels: hardware, vhdl
async fifoA dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
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Mutual labels: verification, synthesis