All Projects → RC4ML → Shuhai

RC4ML / Shuhai

Licence: other
Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA

Programming Languages

SystemVerilog
227 projects
c
50402 projects - #5 most used programming language
C++
36643 projects - #6 most used programming language
tcl
693 projects
Verilog
626 projects
Cuda
1817 projects

Projects that are alternatives of or similar to Shuhai

eddr3
mirror of https://git.elphel.com/Elphel/eddr3
Stars: ✭ 33 (-37.74%)
Mutual labels:  fpga, ddr
FPGA ThreeLevelStorage
【原创,已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计,FPGA三级存储子系统。
Stars: ✭ 86 (+62.26%)
Mutual labels:  fpga, ddr
Coyote
Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.
Stars: ✭ 80 (+50.94%)
Mutual labels:  fpga, hbm
ddal
DDAL(Distributed Data Access Layer) is a simple solution to access database shard.
Stars: ✭ 33 (-37.74%)
Mutual labels:  ddr
async fifo
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
Stars: ✭ 117 (+120.75%)
Mutual labels:  fpga
SpinalCrypto
SpinalHDL - Cryptography libraries
Stars: ✭ 36 (-32.08%)
Mutual labels:  fpga
react-native-startup-time
measure startup time of your react-native app
Stars: ✭ 88 (+66.04%)
Mutual labels:  benchmark
StreamBench
Measuring the performance of popular streaming engines with Yahoo's Streaming Benchmark
Stars: ✭ 52 (-1.89%)
Mutual labels:  benchmark
DeepLearningBenchmarks
Benchmarks across Deep Learning Frameworks in Julia and Python
Stars: ✭ 24 (-54.72%)
Mutual labels:  benchmark
streamalg
Extensible stream pipelines with object algebras.
Stars: ✭ 26 (-50.94%)
Mutual labels:  benchmark
spydrnet
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
Stars: ✭ 49 (-7.55%)
Mutual labels:  fpga
vivado-docker
Dockerfile with Vivado for CI
Stars: ✭ 22 (-58.49%)
Mutual labels:  fpga
php-orm-benchmark
The benchmark to compare performance of PHP ORM solutions.
Stars: ✭ 82 (+54.72%)
Mutual labels:  benchmark
KiCad-Schematic-Symbol-Libraries
Schematic symbol libraries for FPGAs & microcontrollers.
Stars: ✭ 70 (+32.08%)
Mutual labels:  fpga
perforator
Record "perf" performance metrics for individual functions/regions of an ELF binary.
Stars: ✭ 33 (-37.74%)
Mutual labels:  benchmark
LVDS-7-to-1-Serializer
An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.
Stars: ✭ 33 (-37.74%)
Mutual labels:  fpga
playwright-test
Run unit tests with several runners or benchmark inside real browsers with playwright.
Stars: ✭ 81 (+52.83%)
Mutual labels:  benchmark
Home-Brew-Computer
SystemOT, yet another home brew cpu.
Stars: ✭ 21 (-60.38%)
Mutual labels:  fpga
DiscEval
Discourse Based Evaluation of Language Understanding
Stars: ✭ 18 (-66.04%)
Mutual labels:  benchmark
clash-compucolor2
Clash implementation of the Compucolor II home computer
Stars: ✭ 25 (-52.83%)
Mutual labels:  fpga

Shuhai

Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA.

Two Reasons Why We Need Shuhai?

First, in terms of benchmarking memory, it can be done better on FPGA, rather than on CPU/GPU. In particular, when benchmarking memory on cpu/gpu, we cannot get rid of the negative effect of cache/TLB. So there is a lot of work about benchmarking cache in CPUs/GPUs, rather than directly benchmarking memory. In contrast, when benchmarking memory on an FPGA, the benchmarking hardware engine can directly attach to the memory such that there is no noise between the targeted memory and the benchmarking engine.

Second, we do not need to reinvent a wheel again for each memory/FPGA. With Shuhai, before implementing the concrete application that contains a particular memory access pattern on the FPGA, we are able to benchmark the corresponding memory access pattern to make sure that the memory side will not be the bottleneck. In case it is, the authors need to tune the implementation to have a more efficient memory access pattern such that your application will not be bound by memory.

1. Getting Started

$ git clone https://github.com/RC4ML/Shuhai.git
$ git submodule update --init --recursive

2. Build FPGA Project

$ cd hw/

According to hw/README.md, build vivado project and program the FPGA with the generated bitstream.

3. Build Software Project

$ cd sw/

According to sw/README.md, build the software project and run the application

Frequently Asked Questions

1, Q. the machine failed to detect PCIe on the FPGA when loading the kernel module.

A. Connect the JTAG to another machine that will not crash when downloading the FPGA image. It means that you cannot use the same machine to load the bitstream.

Cite this work

If you use it in your paper, please cite our work (full version).

@inproceedings{wang_fccm20,
  title={Shuhai: Benchmarking High Bandwidth Memory On FPGAs},
  author={Zeke Wang and Hongjing Huang and Jie Zhang and Gustavo Alonso},
  year={2020},
  booktitle={IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)},
}

@inproceedings{wang_tc21,
  title={Shuhai: A Tool for Benchmarking High Bandwidth Memory On FPGAs},
  author={Hongjing Huang and Zeke Wang and Jie Zhang, Zhenhao He and Chao Wu and Jun Xiao and Gustavo Alonso},
  year={2021},
  booktitle={IEEE Transactions on Computers (TC)}
}


Related publications

Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].