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→ YosysHQ
12 open source projects by YosysHQ
[ Open user page on Github ]
1.
Fpga Toolchain
Multi-platform nightly builds of open source FPGA tools
✭ 210
c
2.
Symbiyosys
SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
✭ 175
python
3.
Yosys
Yosys Open SYnthesis Suite
✭ 1,992
C++
Verilog
TeX
python
SystemVerilog
Yacc
4.
Apicula
Project Apicula 🐝: bitstream documentation for Gowin FPGAs
✭ 130
python
5.
Icestorm
Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)
✭ 664
python
6.
Nextpnr
nextpnr portable FPGA place and route tool
✭ 646
7.
Arachne Pnr
Place and route tool for FPGAs
✭ 382
8.
Prjtrellis
Documenting the Lattice ECP5 bit-stream format.
✭ 272
verilog
9.
yosys-plugins
Yosys Plugins
✭ 22
Yacc
C++
Lex
VHDL
Makefile
shell
10.
oss-cad-suite-build
Multi-platform nightly builds of open source digital design and verification tools
✭ 316
python
shell
c
Dockerfile
Makefile
CMake
Batchfile
11.
VlogHammer
A Verilog Synthesis Regression Test
✭ 29
shell
Verilog
C++
python
Makefile
perl
12.
padring
A padring generator for ASICs
✭ 19
C++
CMake
asic
eda
chip
vlsi
yosys
1-12
of
12
user projects
