pystellaA code generator for grid-based PDE solving on CPUs and GPUs
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AutoSAAutoSA: Polyhedral-Based Systolic Array Compiler
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john-packagesCommunity packages of John the Ripper (a Docker image, a Flatpak, a Windows PortableApp, and Ubuntu SNAP packages)
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docker-fpgaDockerized FPGA toolchain experiments
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FPGA NTP SERVERA FPGA implementation of the NTP and NTS protocols
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pdp6PDP-6 Emulator
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noasicAn open-source VHDL library for FPGA design.
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FpOCFPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.
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dlprimitivesDeep Learning Primitives and Mini-Framework for OpenCL
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nano-vanityA NANO vanity address generator (supports OpenCL)
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rectdetectRealtime rectangle detector with GPGPU
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sdram-controllerGeneric FPGA SDRAM controller, originally made for AS4C4M16SA
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clash-spaceinvadersIntel 8080-based Space Invaders arcade machine implemented on an FPGA, written in CLaSH
Stars: ✭ 45 (+18.42%)
ZYNQ-NVDLANVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
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ShuhaiShuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA
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FAST-Pathology⚡ Open-source software for deep learning-based digital pathology
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t2spProductive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)
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risc8Mostly AVR compatible FPGA soft-core
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clash-compucolor2Clash implementation of the Compucolor II home computer
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eddr3mirror of https://git.elphel.com/Elphel/eddr3
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EDSACFPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope
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MobileNet-in-FPGAGenerator of verilog description for FPGA MobileNet implementation
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async fifoA dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
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EBAZ4205Vivado and PetaLinux projects for Zynq EBAZ4205 Board
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usbcorevA full-speed device-side USB peripheral core written in Verilog.
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penguinVSimple and fast C++ image processing library with focus on heterogeneous systems
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PandA-bambuPandA-bambu public repository
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bandicoot-codeBandicoot: GPU accelerator add-on for the Armadillo C++ linear algebra library
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gatewareA collection of little open source FPGA hobby projects
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vhdl-hdmi-outHDMI Out VHDL code for 7-series Xilinx FPGAs
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ACCLAccelerated Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
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Hetero-MarkA Benchmark Suite for Heterogeneous System Computation
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learn-gpgpuAlgorithms implemented in CUDA + resources about GPGPU
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veriflaFork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm
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gardeniaGARDENIA: Graph Analytics Repository for Designing Efficient Next-generation Accelerators
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BenEaterVHDLVHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)
Stars: ✭ 30 (-21.05%)
CLUThe OpenCL Utility library
Stars: ✭ 18 (-52.63%)
vexed-generationPolymorphic helper functions & geometry ops for Houdini VEX / OpenCL
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stereo-vision-fpgaReal-time binocular stereo vision FPGA system with OV5640 cameras
Stars: ✭ 20 (-47.37%)
SneakySnakeSneakySnake🐍 is the first and the only pre-alignment filtering algorithm that works efficiently and fast on modern CPU, FPGA, and GPU architectures. It greatly (by more than two orders of magnitude) expedites sequence alignment calculation for both short and long reads. Described in the Bioinformatics (2020) by Alser et al. https://arxiv.org/abs…
Stars: ✭ 44 (+15.79%)
quasiSoCNo-MMU Linux capable RISC-V SoC designed to be useful.
Stars: ✭ 29 (-23.68%)
virtioVirtio implementation in SystemVerilog
Stars: ✭ 38 (+0%)
328eforth328eForth for Arduino with mods for coinForth
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hpcLearning and practice of high performance computing (CUDA, Vulkan, OpenCL, OpenMP, TBB, SSE/AVX, NEON, MPI, coroutines, etc. )
Stars: ✭ 39 (+2.63%)
fpga-tidbitsChisel components for FPGA projects
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fasmFPGA Assembly (FASM) Parser and Generator
Stars: ✭ 69 (+81.58%)
khiva-pythonPython binding for Khiva library.
Stars: ✭ 44 (+15.79%)
gateware-tsHardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools
Stars: ✭ 83 (+118.42%)
cnn openA hardware implementation of CNN, written by Verilog and synthesized on FPGA
Stars: ✭ 157 (+313.16%)
gr-clenabledOpenCL/GPU-enabled common blocks for GNURadio
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pergolaLow-cost ECP5 FPGA development board
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PothosZynqDMA source and sink blocks for Xilinx Zynq FPGAs
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