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xedaCross EDA Abstraction and Automation
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Mutual labels: fpga, vhdl
fpga-dockerTools for running FPGA vendor toolchains with Docker
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Mutual labels: fpga, vhdl
Spi FpgaSPI master and slave for FPGA written in VHDL
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Mutual labels: fpga, vhdl
captouch👇 Add capacitive touch buttons to any FPGA!
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Mutual labels: fpga, vhdl
fpga torture🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
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Mutual labels: fpga, vhdl
Simon speck ciphersImplementations of the Simon and Speck Block Ciphers
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vhdl-hdmi-outHDMI Out VHDL code for 7-series Xilinx FPGAs
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J1scA reimplementation of a tiny stack CPU
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Space Invaders VhdlSpace Invaders game implemented with VHDL
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Haddoc2Caffe to VHDL
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Forth CpuA Forth CPU and System on a Chip, based on the J1, written in VHDL
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Fpga FftA highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
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VexriscvA FPGA friendly 32 bit RISC-V CPU implementation
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vscode-terosHDLVHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
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BenEaterVHDLVHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)
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Mutual labels: fpga, vhdl
