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All Projects → VLSI-EDA → PoC-Examples

VLSI-EDA / PoC-Examples

Licence: Apache-2.0 License
This repository contains synthesizable examples which use the PoC-Library.

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VHDL
269 projects

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fpgaexamplevhdlsynthesispoc-library

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The PoC-Examples Collection

PoC - “Pile of Cores” provides implementations for often required hardware functions such as FIFOs, RAM wrapper, and ALUs. The hardware modules are typically provided as VHDL or Verilog source code, so it can be easily re-used in a variety of hardware designs.

This repository provides common examples and synthesis tests to show how the PoC-Library can be used. The PoC-Library is referenced as a git submodule.

Table of Content:

  1. Overview
  2. Download
  3. Requirements
  4. Configure PoC-Examples on a Local System
  5. Synthesizing Examples
  6. Updating PoC

1 Overview

TODO TODO TODO

2 Download

The PoC-Examples Collection can be downloaded as a zip-file (latest 'master' branch) or cloned with git clone from GitHub. GitHub offers HTTPS and SSH as transfer protocols. See the Download wiki page for more details.

For SSH protocol use the URL ssh://[email protected]:VLSI-EDA/PoC-Examples.git or command line instruction:

cd <GitRoot>
git clone --recursive ssh://git@github.com:VLSI-EDA/PoC-Examples.git PoC-Examples

For HTTPS protocol use the URL https://github.com/VLSI-EDA/PoC-Examples.git or command line instruction:

cd <GitRoot>
git clone --recursive https://github.com/VLSI-EDA/PoC-Examples.git PoC-Examples

Note: The option --recursive performs a recursive clone operation for all linked git submodules. An additional git submodule init and git submodule update call is not needed anymore.

3 Requirements

The PoC-Examples Collection and the PoC-Library come with some scripts to ease most of the common tasks, like running testbenches, generating IP cores or synthesizing examples. We choose to use Python as a platform independent scripting environment. All Python scripts are wrapped in PowerShell or Bash scripts, to hide some platform specifics of Windows or Linux. See the Requirements wiki page for more details and download sources.

Common requirements:
  • Programming languages and runtimes:
  • Synthesis tool chains:
    • Xilinx ISE 14.7 or
    • Xilinx Vivado ≥ 2014.1 or
    • Altera Quartus-II ≥ 13.x
  • Simulation tool chains:
    • Xilinx ISE Simulator 14.7 or
    • Xilinx Vivado Simulator ≥ 2014.1 or
    • Mentor Graphics ModelSim Altera Edition or
    • Mentor Graphics QuestaSim or
    • GHDL and GTKWave
Linux specific requirements:
  • Debian specific:
    • bash is configured as /bin/sh (read more)
      dpkg-reconfigure dash
Windows specific requirements:

4 Configure PoC-Examples on a Local System

To explore PoC-Examples' and PoC's full potential, it's required to configure some paths and synthesis or simulation tool chains. The following commands start a guided configuration process. Please follow the instructions. It's possible to relaunch the process at every time, for example to register new tools or to update tool versions. See the Configuration wiki page for more details.

4.1 Configuring the Embedded PoC-Library

All Windows command line instructions are intended for Windows PowerShell, if not marked otherwise. So executing the following instructions in Windows Command Prompt (cmd.exe) won't function or result in errors! See the Requirements wiki page on where to download or update PowerShell.

Run the following command line instructions to configure the embedded PoC-Library on your local system.

cd <ExamplesRoot>
cd lib\PoC\
.\poc.ps1 configure

4.2 Creating PoC's my_project File

The PoC-Library needs two VHDL files for it's configuration. These files are used to determine the most suitable implementation depending on the provided platform information. A set of my_config files is provided within the collection, but a per host my_project.vhdl needs to be created.

The my_project file can be created from a template provided by PoC in <ExamplesRoot>\lib\PoC\src\common\my_project.vhdl.template.

The file must to be copyed into the collection's source directory <ExamplesRoot>\src\common and rename into my_project.vhdl. This file must not be included into version control systems - it's private to a host computer.

cd <ExamplesRoot>
cp lib\PoC\src\common\my_project.vhdl.template src\common\my_project.vhdl

my_project.vhdl defines two global constants, which need to be adjusted:

constant MY_PROJECT_DIR      : string := "CHANGE THIS"; -- e.g. d:/vhdl/myproject/, /home/me/projects/myproject/"
constant MY_OPERATING_SYSTEM : string := "CHANGE THIS"; -- e.g. WINDOWS, LINUX

5 Synthesizing Examples

The PoC-Examples Collection is shipped with project files for various tool chains and IDEs.

5.1 Using Xilinx ISE

5.2 Using Xilinx Vivado

5.3 Using Altera Quartus-II

6 Updating PoC-Examples

Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].