All Projects → suoto → vim-hdl

suoto / vim-hdl

Licence: GPL-3.0 license
Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)

Programming Languages

python
139335 projects - #7 most used programming language
Vim Script
2826 projects
shell
77523 projects
Dockerfile
14818 projects

Projects that are alternatives of or similar to vim-hdl

intfftk
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
Stars: ✭ 43 (-27.12%)
Mutual labels:  vhdl, verilog, xilinx, altera
fpga-docker
Tools for running FPGA vendor toolchains with Docker
Stars: ✭ 54 (-8.47%)
Mutual labels:  vhdl, verilog, xilinx, altera
JSON-for-VHDL
A JSON library implemented in VHDL.
Stars: ✭ 56 (-5.08%)
Mutual labels:  vhdl, xilinx, modelsim
Hdl checker
Repurposing existing HDL tools to help writing better code
Stars: ✭ 103 (+74.58%)
Mutual labels:  vhdl, verilog
Vexriscv
A FPGA friendly 32 bit RISC-V CPU implementation
Stars: ✭ 1,041 (+1664.41%)
Mutual labels:  vhdl, verilog
J1sc
A reimplementation of a tiny stack CPU
Stars: ✭ 64 (+8.47%)
Mutual labels:  vhdl, verilog
Cocotb
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
Stars: ✭ 740 (+1154.24%)
Mutual labels:  vhdl, verilog
Degate
Open source software for chip reverse engineering.
Stars: ✭ 156 (+164.41%)
Mutual labels:  vhdl, verilog
Tinytpu
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
Stars: ✭ 153 (+159.32%)
Mutual labels:  vhdl, verilog
SpinalDev
Docker Development Environment for SpinalHDL
Stars: ✭ 17 (-71.19%)
Mutual labels:  vhdl, verilog
verilog-vcd-parser
A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.
Stars: ✭ 46 (-22.03%)
Mutual labels:  vhdl, verilog
Ophidian
Ophidian's Mirror Repository on github. https://gitlab.com/eclufsc/eda/ophidian
Stars: ✭ 32 (-45.76%)
Mutual labels:  vhdl, verilog
Image Processing
Image Processing Toolbox in Verilog using Basys3 FPGA
Stars: ✭ 31 (-47.46%)
Mutual labels:  vhdl, verilog
Awesome Open Hardware Verification
A List of Free and Open Source Hardware Verification Tools and Frameworks
Stars: ✭ 103 (+74.58%)
Mutual labels:  vhdl, verilog
Clash Compiler
Haskell to VHDL/Verilog/SystemVerilog compiler
Stars: ✭ 958 (+1523.73%)
Mutual labels:  vhdl, verilog
xeda
Cross EDA Abstraction and Automation
Stars: ✭ 25 (-57.63%)
Mutual labels:  vhdl, verilog
virtio
Virtio implementation in SystemVerilog
Stars: ✭ 38 (-35.59%)
Mutual labels:  verilog, xilinx
SpinalCrypto
SpinalHDL - Cryptography libraries
Stars: ✭ 36 (-38.98%)
Mutual labels:  vhdl, verilog
Awesome Hdl
Hardware Description Languages
Stars: ✭ 385 (+552.54%)
Mutual labels:  vhdl, verilog
Spinalhdl
Scala based HDL
Stars: ✭ 696 (+1079.66%)
Mutual labels:  vhdl, verilog

vim-hdl

May I have your attention please?

HDL Checker implements the core functionality of vim-hdl and because it now supports Language Server Protocol, vim-hdl is being deprecated

How to continue using HDL Checker

Any LSP client should work, be it on Vim or other editors.

Have a look at HDL Checker supported editors to check some examples of how to set it up.

But I want to keep using Syntastic!

You'll need to install HDL Checker pip package:

pip install hdl-checker --upgrade

or

pip install hdl-checker --upgrade --user

Just make sure you can run hdl_checker --version and it should work just fine.

Rationale

Back when vim-hdl started, Vim did not have the widespread support for LSP it has today and with it I can actually focus in the core functionality and support more platforms at the same time. This last update is likely the last one!


Build Status codecov Join the chat at https://gitter.im/suoto/vim-hdl Analytics

vim-hdl is a Vim plugin that uses HDL Checker to provide some helpers to VHDL development:


vim-hdl screenshot


Installation

Pathogen

cd ~/.vim/bundle/
git clone https://github.com/suoto/vim-hdl.git

Vundle

In your .vimrc:

Plugin 'suoto/vim-hdl'

Notes

  • Requires Vim compiled with Python support, plus features needed by Syntastic itself
  • Only tested on Linux with recent Vim versions (7.4+)

Usage

vim-hdl requires a configuration file listing libraries, source files, build flags, etc. Select the configuration file via

" Configure the project file
let g:vimhdl_conf_file = '<config/file>'

You use the VimhdlCreateProjectFile command to search and help you setting up the configuration file

:VimhdlCreateProjectFile <optional/path/to/files>

See the wiki for details on how to write it.

Any other Syntastic option should work as well.

You can clone vim-hdl-examples repository and try a ready to use setup.


Supported third-party compilers


Style checking

Style checks are independent of a third-party compiler. Checking includes:

  • Signal names in lower case
  • Constants and generics in upper case
  • Unused signals, constants, generics, shared variables, libraries, types and attributes
  • Comment tags (FIXME, TODO, XXX)

Notice that currently the unused reports has caveats, namely declarations with the same name inherited from a component, function, procedure, etc. In the following example, the signal rdy won't be reported as unused in spite of the fact it is not used.

signal rdy, refclk, rst : std_logic;
...

idelay_ctrl_u : idelay_ctrl
    port map (rdy    => open,
              refclk => refclk,
              rst    => rst);

Issues

  • vim-hdl issue tracker should be used for bugs, feature requests, etc related to the Vim client itself (something that only happens with Vim)
  • HDL Checker issue tracker should be used for bugs, feature requests, etc related to the code checker backend.

If unsure, use vim-hdl issue tracker, it will be moved to HDL Checker issue tracker if applicable.

License

This software is licensed under the GPL v3 license.

Notice

Mentor Graphics®, ModelSim® and their respective logos are trademarks or registered trademarks of Mentor Graphics, Inc.

Altera® and its logo is a trademark or registered trademark of Altera Corporation.

Xilinx® and its logo is a trademark or registered trademark of Xilinx, Inc.

vim-hdl's author has no connection or affiliation to any of the trademarks mentioned or used by this software.

Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].