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spectorSpector: An OpenCL FPGA Benchmark Suite
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usbcorevA full-speed device-side USB peripheral core written in Verilog.
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e-verestEVEREST: e-Versatile Research Stick for peoples
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sdram-controllerGeneric FPGA SDRAM controller, originally made for AS4C4M16SA
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stereo-vision-fpgaReal-time binocular stereo vision FPGA system with OV5640 cameras
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openartyAn Open Source configuration of the Arty platform
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eddr3mirror of https://git.elphel.com/Elphel/eddr3
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hdelkWeb-based HDL diagramming tool
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dsp-theoryTheory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.
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FpOCFPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.
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karutaKaruta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.
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rodiniaAGM bitstream utilities and decoded files from Supra
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gatewareA collection of little open source FPGA hobby projects
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ILAngA Modeling and Verification Platform for SoCs using ILAs
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OpenLaneOpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
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