QNICE-FPGAQNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
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Awesome-Retro-DocsA curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.
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spu32Small Processing Unit 32: A compact RV32I CPU written in Verilog
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LimagoLimago: an FPGA-based Open-source 100 GbE TCP/IP Stack
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veriflaFork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm
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EDSACFPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope
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ShuhaiShuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA
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fpga-tidbitsChisel components for FPGA projects
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clash-compucolor2Clash implementation of the Compucolor II home computer
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apollomicrocontroller-based FPGA / JTAG programmer
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ACCLAccelerated Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
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Hard-JPEG-LSFPGA-based JPEG-LS image compressor.
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risc8Mostly AVR compatible FPGA soft-core
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clash-spaceinvadersIntel 8080-based Space Invaders arcade machine implemented on an FPGA, written in CLaSH
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IIoT-SPYNIIoT-SPYN gives users the ability to control, monitor, capture data, visualize and analyze industrial grade motors
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t2spProductive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)
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noasicAn open-source VHDL library for FPGA design.
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KRSThe Kria Robotics Stack (KRS) is a ROS 2 superset for industry, an integrated set of robot libraries and utilities to accelerate the development, maintenance and commercialization of industrial-grade robotic solutions while using adaptive computing.
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PothosZynqDMA source and sink blocks for Xilinx Zynq FPGAs
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vhdl-hdmi-outHDMI Out VHDL code for 7-series Xilinx FPGAs
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docker-fpgaDockerized FPGA toolchain experiments
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pdp6PDP-6 Emulator
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ZYNQ-NVDLANVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
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TinyMIPSThe Project TinyMIPS is dedicated to enabling undergraduates to build a complete computer system from scratch.
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yarviYet Another RISC-V Implementation
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up5kUpduino v2 with the ice40 up5k FPGA demos
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ESP32 ThingDevelopment platform for the Espressif ESP32 WiFi/Microcontroller SoC
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fpga-nnNN on FPGA
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no2muacmDrop In USB CDC ACM core for iCE40 FPGA
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ice-chips-verilogIceChips is a library of all common discrete logic devices in Verilog
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FPGA-CNNThis repo is for ECE44x (Fall2015-Spring2016)
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fpga caffeNo description or website provided.
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SpinalCryptoSpinalHDL - Cryptography libraries
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oscimpDigitalOscillatorIMP ecosystem for the digital characterization of ultrastable oscillators and Software Defined Radio (SDR) frontend processing
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spydrnetA flexible framework for analyzing and transforming FPGA netlists. Official repository.
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MobileNet-in-FPGAGenerator of verilog description for FPGA MobileNet implementation
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PeakRDL-ipxactImport and export IP-XACT XML register models
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async fifoA dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
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pergolaLow-cost ECP5 FPGA development board
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LVDS-7-to-1-SerializerAn Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.
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dcurlHardware-accelerated Multi-threaded IOTA PoW, drop-in replacement for ccurl
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yosysUnofficial Yosys WebAssembly packages
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pano manSimulation of the classic Pacman arcade game on a PanoLogic thin client.
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KyogenRVThe Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.
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communityROS 2 Hardware Acceleration Working Group community governance model & list of projects
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quartus-installInstall Intel FPGA 'Quartus Prime' software on remote servers
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328eforth328eForth for Arduino with mods for coinForth
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TARTTransient Array Radio Telescope
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