ILAngA Modeling and Verification Platform for SoCs using ILAs
OpenLaneOpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
QNICE-FPGAQNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
ESP32 ThingDevelopment platform for the Espressif ESP32 WiFi/Microcontroller SoC
spu32Small Processing Unit 32: A compact RV32I CPU written in Verilog
Awesome-Retro-DocsA curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.