169 Open source projects that are alternatives of or similar to OpenNAS

RBM implemented with spiking neurons in Python. Contrastive Divergence used to train the network.

@elahe-dastan / @1995parham training and testing repository 📚 🤓

A simple RISC-V processor for use in FPGA designs.

Library of VHDL components that are useful in larger designs.

bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem

👇 Add capacitive touch buttons to any FPGA!

Second version of homemade 30 MHz - 6 GHz VNA

VHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)

Deep learning integration for Nengo

VHDL library 4 FPGAs

FPGA-based HDMI ambient lighting

Data encoders

An implementation of DisplayPort protocol for FPGAs

HDMI Out VHDL code for 7-series Xilinx FPGAs

A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.

A brian2 extension to simulate spiking neural networks on GPUs

Space Invaders game implemented with VHDL

SpinalHDL - Cryptography libraries

Component video modification for the C64 8-bit computer

Interface for MSX to Connect and use Raspberry Pi resources

Low-level Python APIs for Accessing Neuromorphic Devices.

Docker Development Environment for SpinalHDL

GBA on FPGA

Various projects for the Nexys4DDR board from Digilent

A Forth CPU and System on a Chip, based on the J1, written in VHDL

A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.

A list of papers, docs, codes about model quantization. This repo is aimed to provide the info for model quantization research, we are continuously improving the project. Welcome to PR the works (papers, repositories) that are missed by the repo.

Brain Dynamics Programming in Python

VHDL synthesis (based on ghdl)

Cross EDA Abstraction and Automation

UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/

Simple implementation of cache using VHDL

Open source software for chip reverse engineering.

VHDL formatter web online written in typescript

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

Deep learning for spiking neural networks

Fletcher: A framework to integrate FPGA accelerators with Apache Arrow

Python library for easy creation and running of spiking neural networks in tensorflow.

OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...

A simple I2C minion in VHDL

MEGA65 FPGA core

🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.

Two RX-channel 6 GHz FMCW radar design files

Flexible VHDL library

A very small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

The Zylin ZPU

VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin

Receiving and processing 1080p HDMI audio and video on the Artix 7 FPGA

Neural Simulator for AGI research and development

Cosmos OpenSSD + Hardware and Software source distribution

spiking-neural-networks

Tools for running FPGA vendor toolchains with Docker

Synaptic Plasticity with Online Reinforcement learning

Virtual development board for HDL design

JAX-based Spiking Neural Network framework

Training spiking networks with hybrid ann-snn conversion and spike-based backpropagation

RISC-V by VectorBlox