553 Open source projects that are alternatives of or similar to phywhispererusb

Unofficial Yosys WebAssembly packages

High throughput JPEG decoder in Verilog for FPGA

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.

HLS branch of Halide

STM32 USB simulates CH341.

FPGA 101 - Workshop materials

Accelerated Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators

A mixed signal netlist language (pre-alpha)

This repository contains iCEBreaker examples for Amaranth HDL.

SPI master and slave for FPGA written in VHDL

Wishbone controlled I2C controllers

Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe

STM32-based ISA-over-USB-adapter

A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

KiKPad : the Midiplus SmartPad reinvented !

🤖 SoCFPGA: Open Source embedded Linux developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)

Sphinx Extension which generates various types of diagrams from Verilog code.

Retro Z80 computer for the Pano Logic Thin Client

🌐 Manager for portable applications

Image Processing Toolbox in Verilog using Basys3 FPGA

USB-PD soldering station for JBC C245 handles.

❄️ Visual editor for open FPGA boards

Open-source control software for the Embrava Blynclight

A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems

A Vivado HLS Command Line Helper Tool

Automatic GPU, TPU, FPGA, Xeon Phi, Multithreaded, Distributed, etc. offloading for scientific machine learning (SciML) and differential equations

!NO MORE MAINTAINED! Reactive API Wrapper for Twitch in Kotlin/JVM

SneakySnake🐍 is the first and the only pre-alignment filtering algorithm that works efficiently and fast on modern CPU, FPGA, and GPU architectures. It greatly (by more than two orders of magnitude) expedites sequence alignment calculation for both short and long reads. Described in the Bioinformatics (2020) by Alser et al. https://arxiv.org/abs…

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

Yet Another RISC-V Implementation

Scala based HDL

Small Processing Unit 32: A compact RV32I CPU written in Verilog

Multi-platform high performance deep learning inference engine (『飞桨』多平台高性能深度学习预测引擎）

Visit BLOG : https://com-chris1111.github.io

Package manager and build abstraction tool for FPGA/ASIC development

Modbus TCP and RTU, Master and Slave for STM32 using Cube HAL and FreeRTOS

The USRP™ Hardware Driver Repository

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

No-MMU Linux capable RISC-V SoC designed to be useful.

collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning

A configurable C++ generator of pipelined Verilog FFT cores

TornadoVM: A practical and efficient heterogeneous programming framework for managed languages

FPGA Assembly (FASM) Parser and Generator

RISC-V Cores, SoC platforms and SoCs

Amlogic USB Boot Protocol Library

Machine learning in FPGAs using HLS

Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools

Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.

GPIB IEEE 488.1 core

required (and optional) source files for the Arduino development environment, specifically the hardware/arduino sub-directory, to support xmega processors

Turning .NET assemblies into FPGA hardware for faster execution and lower power usage. See the Readme and https://hastlayer.com.

80186 compatible SystemVerilog CPU core and FPGA reference design

Linux qca/ath wireless driver tree (based on git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git)

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

GitHub - Task list completed PR check

⚡ Open GitHub repositories in online web IDE

🖥 Backend for chattt

A FPGA implementation of the NTP and NTS protocols