All Projects → RAPcores → rapcores

RAPcores / rapcores

Licence: ISC License
Robotic Application Processor

Programming Languages

Verilog
626 projects
c
50402 projects - #5 most used programming language
Makefile
30231 projects
Nix
1067 projects
C++
36643 projects - #6 most used programming language
shell
77523 projects

Projects that are alternatives of or similar to rapcores

1bitSDR
Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom
Stars: ✭ 53 (+278.57%)
Mutual labels:  fpga, verilog
FPGA-USB-Device
FPGA-based USB-device controller to implement USB-CDC, USB-HID, etc.
Stars: ✭ 29 (+107.14%)
Mutual labels:  fpga, verilog
eddr3
mirror of https://git.elphel.com/Elphel/eddr3
Stars: ✭ 33 (+135.71%)
Mutual labels:  fpga, verilog
ZYNQ-NVDLA
NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
Stars: ✭ 144 (+928.57%)
Mutual labels:  fpga, verilog
hwt
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
Stars: ✭ 145 (+935.71%)
Mutual labels:  fpga, verilog
karuta
Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.
Stars: ✭ 89 (+535.71%)
Mutual labels:  fpga, verilog
usbcorev
A full-speed device-side USB peripheral core written in Verilog.
Stars: ✭ 135 (+864.29%)
Mutual labels:  fpga, verilog
verifla
Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm
Stars: ✭ 21 (+50%)
Mutual labels:  fpga, verilog
math
Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
Stars: ✭ 15 (+7.14%)
Mutual labels:  fpga, verilog
wbi2c
Wishbone controlled I2C controllers
Stars: ✭ 25 (+78.57%)
Mutual labels:  fpga, verilog
EDSAC
FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope
Stars: ✭ 28 (+100%)
Mutual labels:  fpga, verilog
getting-started
List of ideas for getting started with TimVideos projects
Stars: ✭ 50 (+257.14%)
Mutual labels:  fpga, verilog
FPGA RealTime and Static Sobel Edge Detection
Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images
Stars: ✭ 14 (+0%)
Mutual labels:  fpga, verilog
FpOC
FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.
Stars: ✭ 138 (+885.71%)
Mutual labels:  fpga, verilog
yarvi
Yet Another RISC-V Implementation
Stars: ✭ 59 (+321.43%)
Mutual labels:  fpga, verilog
FPGA NTP SERVER
A FPGA implementation of the NTP and NTS protocols
Stars: ✭ 27 (+92.86%)
Mutual labels:  fpga, verilog
pdp6
PDP-6 Emulator
Stars: ✭ 47 (+235.71%)
Mutual labels:  fpga, verilog
fpga-nn
NN on FPGA
Stars: ✭ 16 (+14.29%)
Mutual labels:  fpga, verilog
dblclockfft
A configurable C++ generator of pipelined Verilog FFT cores
Stars: ✭ 147 (+950%)
Mutual labels:  fpga, verilog
shapool-core
FPGA core for SHA256d mining targeting Lattice iCE40 devices.
Stars: ✭ 19 (+35.71%)
Mutual labels:  fpga, verilog

RAPcores

RAPcore

https://rapcores.org/rapcores/

Robotic Application Processing Cores.

RAPcores is a motor and motion control toolkit for FPGAs and ASIC devices. It creates a peripheral that sits between kinematics engines and motors to free up processing power, enrich dynamical models, and greatly simplify the motor driver.

Docs

FPGA Support

The following FPGA architectures are supported and tested on our build configuration system:

  • iCE40
  • ECP5
  • Gowin (Experimental)
  • nexus (Experimental)

We welcome ports to other architectures.

An early pathfinder has been hardened on ASIC for the Skywater Open MPW run using OpenLANE:

RAPcores RTL is written in Verilog and tested with Yosys and IVerilog.

License

ISC License

Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].