1142 Open source projects that are alternatives of or similar to rapcores

Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom

FPGA-based USB-device controller to implement USB-CDC, USB-HID, etc.

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

List of ideas for getting started with TimVideos projects

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

Tools for running FPGA vendor toolchains with Docker

A programming language for FPGAs.

stepd - External planner and stepper for 3d printing

Wishbone controlled I2C controllers

NN on FPGA

Bus bridges and other odds and ends

A FPGA implementation of the NTP and NTS protocols

FPGA/hardware design of openwifi

Must-have verilog systemverilog modules

Notes on the Red Pitaya Open Source Instrument

【原创，已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计，FPGA三级存储子系统。

Yet Another Tetris on FPGA Implementation

Lattice iCE40: development platform for PlatformIO

A realistic simulator for a 3D printer motion controller

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.

PDP-6 Emulator

Generator of verilog description for FPGA MobileNet implementation

Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.

CHIP-8 console on FPGA

A configurable C++ generator of pipelined Verilog FFT cores

Recipe for FPGA cooking

Verilog Generator of Neural Net Digit Detector for FPGA

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

CNN acceleration on virtex-7 FPGA with verilog HDL

32-bit Superscalar RISC-V CPU

Docker Development Environment for SpinalHDL

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

Cross EDA Abstraction and Automation

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....

Materials for "Introduction to FPGA and Verilog" at MIPT DREC

Programmable multichannel ADPCM decoder for FPGA

FPGA core for SHA256d mining targeting Lattice iCE40 devices.

open-source IEEE 802.11 WiFi baseband FPGA (chip) design

MOS6581 SID chip emulator in SystemVerilog

Sphinx Extension which generates various types of diagrams from Verilog code.

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Small Processing Unit 32: A compact RV32I CPU written in Verilog

FPGA-based JPEG-LS image compressor.

SpinalHDL - Cryptography libraries

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

Virtio implementation in SystemVerilog

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope

mirror of https://git.elphel.com/Elphel/eddr3

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

All open source file and project for OpenFPGAduino project

Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools

Yet Another RISC-V Implementation

A full-speed device-side USB peripheral core written in Verilog.

Global Dark Mode for ALL apps on ANY platforms.