GitPlanet

Cheap and reliable Node.js hosting starts at $3/month, and $1/month static HTML hosting

Created with love in Canada, visit hostnodejs.com today

Feel like to post an Ad? Learn Details
All Projects β†’ dan-rodrigues β†’ super-miyamoto-sprint

dan-rodrigues / super-miyamoto-sprint

Licence: MIT License
Homebrew game for homebrew FPGA game console

Programming Languages

c
50402 projects - #5 most used programming language
Makefile
30231 projects
C++
36643 projects - #6 most used programming language

Labels

gamefpgaverilogrisc-vbaremetal

Projects that are alternatives of or similar to super-miyamoto-sprint

Platformio Core
PlatformIO is a professional collaborative platform for embedded development πŸ‘½ A place where Developers and Teams have true Freedom! No more vendor lock-in!
Stars: ✭ 5,539 (+11439.58%)
Mutual labels:  fpga, verilog, risc-v
Ustc Rvsoc
FPGA-based RISC-V CPU+SoC.
Stars: ✭ 77 (+60.42%)
Mutual labels:  fpga, verilog, risc-v
Riscv
RISC-V CPU Core (RV32IM)
Stars: ✭ 272 (+466.67%)
Mutual labels:  fpga, verilog, risc-v
Icestation 32
Compact FPGA game console
Stars: ✭ 93 (+93.75%)
Mutual labels:  fpga, verilog, risc-v
drec-fpga-intro
Materials for "Introduction to FPGA and Verilog" at MIPT DREC
Stars: ✭ 66 (+37.5%)
Mutual labels:  fpga, verilog, risc-v
yarvi
Yet Another RISC-V Implementation
Stars: ✭ 59 (+22.92%)
Mutual labels:  fpga, verilog, risc-v
Darkriscv
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
Stars: ✭ 1,062 (+2112.5%)
Mutual labels:  fpga, verilog, risc-v
Tang e203 mini
LicheeTang θœ‚ιΈŸE203 Core
Stars: ✭ 135 (+181.25%)
Mutual labels:  fpga, verilog, risc-v
Biriscv
32-bit Superscalar RISC-V CPU
Stars: ✭ 208 (+333.33%)
Mutual labels:  fpga, verilog, risc-v
spu32
Small Processing Unit 32: A compact RV32I CPU written in Verilog
Stars: ✭ 51 (+6.25%)
Mutual labels:  fpga, verilog, risc-v
getting-started
List of ideas for getting started with TimVideos projects
Stars: ✭ 50 (+4.17%)
Mutual labels:  fpga, verilog, risc-v
karuta
Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.
Stars: ✭ 89 (+85.42%)
Mutual labels:  fpga, verilog
FpOC
FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.
Stars: ✭ 138 (+187.5%)
Mutual labels:  fpga, verilog
eddr3
mirror of https://git.elphel.com/Elphel/eddr3
Stars: ✭ 33 (-31.25%)
Mutual labels:  fpga, verilog
usbcorev
A full-speed device-side USB peripheral core written in Verilog.
Stars: ✭ 135 (+181.25%)
Mutual labels:  fpga, verilog
ZYNQ-NVDLA
NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
Stars: ✭ 144 (+200%)
Mutual labels:  fpga, verilog
FPGA NTP SERVER
A FPGA implementation of the NTP and NTS protocols
Stars: ✭ 27 (-43.75%)
Mutual labels:  fpga, verilog
dblclockfft
A configurable C++ generator of pipelined Verilog FFT cores
Stars: ✭ 147 (+206.25%)
Mutual labels:  fpga, verilog
math
Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
Stars: ✭ 15 (-68.75%)
Mutual labels:  fpga, verilog
shapool-core
FPGA core for SHA256d mining targeting Lattice iCE40 devices.
Stars: ✭ 19 (-60.42%)
Mutual labels:  fpga, verilog
View All Similar Projects βž”

Super Miyamoto Sprint (WIP)

This is a simple retro-inspired platformer game (implemented in C11) targetting a retro-inspired FPGA game console by the same author (implemented in Verilog). It is a bare metal program using sprites and tilemaps to displays graphics similar to other games of the period and works with modest CPU speed and RAM.

2 complete levels are playable.

Photo

Video

This video was captured from a ULX3S using a HDMI capture stick, an SPDIF DAC for audio and a Bluetooth gamepad for controls. Click the thumbnail to watch the video on Youtube.

Gameplay video

Binaries

FPGA bitstreams and game binaries for the program can be downloaded from the Releases page. The game should start after flashing the bitstream.

Flashing to iCEBreaker

iceprog -o 2M prog.bin
iceprog ics32-icebreaker.bit

Flashing to ULX3S

fujprog -j flash -f 0x200000 prog.bin
fujprog -j flash ics32-ulx3s.bit
  • Only the 85F boards are supported as the 12F doesn't have enough block RAM.
  • Note that fujprog will be slow to flash if you are using a game binary with music included.
  • Binaries with music included require a board with 16MByte of flash.

Build prerequisites

  • GNU RISC-V toolchain for cross compilation
  • GNU Make (any version >= 3.81 should work)

If running in the simulator using the make sim target for example, the prerequisites here are also needed.

If running on an iCEBreaker, ULX3S or other supported board, the prerequsites here are also needed.

Audio

Sound effects are included by default but music is not. Running any of the Makefile targets with MUSIC=1 will:

  1. Download and extract audio from preconfigured Youtube videos using youtube-dl with (default is included but can be changed in Makefile)
  2. Convert them using ffmpeg to the required system format (IMA-ADPCM)
  3. Include them in the output binary

Extra prerequisities

Including music adds two prerequisities:

Usage

The CROSS variable in the Makefile should match the prefix of the RISC-V toolchain. By default it is set to riscv-none-embed- which may not match the one installed on the machine.

This project depends on the system repo which is included as a submodule:

git submodule update --init --recursive

Simulator (SDL2)

To build and run in the simulator:

make sim

Usage on FPGA boards

The bitstream for the system itself must be flashed first using these instructions.

To build and run on a given FPGA board:

ULX3S

make ulx3s_prog

make MUSIC=1 ulx3s_prog

The default ULX3S programmer used is fujprog which can be a bit slow for large files. If the built with MUSIC=1 then it might take a minute or two.

iCEBreaker

make icebreaker_prog

make MUSIC=1 icebreaker_prog

Controls

The game can be controlled with (limited) buttons on the FPGA board or with certain USB gamepads. Top level verilog modules for each board show which options are available if any. The simulator uses SDL keyboard input for control.

  • Left/Right: Move
  • Up: Climb
  • Down: Duck
  • B: Jump
  • Y: Run
  • L: Exit vehicle*
  • R: Perform vehicele action (like firing a projectile)*
  • Select: Reset game state (debug)*
  • Start: Pause*

*: USB gamepad is needed for these.

Acknowledgements

Open game art was used for the graphics and audio with some minor alterations. A full list of attributions to the artists is in the ATTRIBUTIONS.md file.

Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].