480 Open source projects that are alternatives of or similar to Fpga Soc Linux

FPGA-based RISC-V CPU+SoC.

ASIO driver, Usb Driver, FX2LP Firmware, VHDL Fpga, Schematics & PCB Layout for the AudioXtreamer, a USB 2.0 32ch Audio/Midi interface for retrofitting into digital mixers/interfaces.

HLS branch of Halide

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

SystemRDL 2.0 language compiler front-end

HDL libraries and projects

Linux kernel with modifications for Microsoft Surface devices.

A 64-bit OS for the Raspberry Pi 3

The Antikernel operating system project

Scala based HDL

Code generation tool for configuration and status registers

PlatformIO IDE for VSCode: The next generation integrated development environment for IoT

XIA implementation for the Linux kernel

Multi-platform high performance deep learning inference engine (『飞桨』多平台高性能深度学习预测引擎）

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Package manager and build abstraction tool for FPGA/ASIC development

Install GNU/Linux on NextBook Flexx 10.1

Docker/Qemu/Bochs Based Linux 0.11 Kernel Development Environment; New Linux ELF Video Course from this project author: https://www.cctalk.com/m/group/88089283

A wishbone controlled scope for FPGA's

A little bit about a linux kernel

Compact FPGA game console

👀 Linux kernel mode debugfs keylogger

A FPGA friendly 32 bit RISC-V CPU implementation

RDMA core userspace libraries and daemons

My proof-of-concept exploits for the Linux kernel

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

Linux内核0.11完全注释V3.0配套源代码

Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink

Documenting the Xilinx 7-series bit-stream format.

Minimal Linux Live (MLL) is a tiny educational Linux distribution, which is designed to be built from scratch by using a collection of automated shell scripts. Minimal Linux Live offers a core environment with just the Linux kernel, GNU C library, and Busybox userland utilities.

PlatformIO IDE for Atom: The next generation integrated development environment for IoT

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

Verilog to Routing -- Open Source CAD Flow for FPGA Research

通过issue和README来记录日常学习研究笔记 关注 机器学习系统，深度学习， LLVM，性能剖视， Linux操作系统内核 话题 关注 C/C++. JAVA. Python. Golang. Chisel. 编程语言话题 ( Writing Blogs using github issue and markdown! (inculding Machine Learning algs and system, LLVM, Linux kernel, java, python, c++, golang)

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

Thoron Framework is a Linux post-exploitation framework that exploits Linux TCP vulnerability to provide a shell-like connection. Thoron Framework has the ability to create simple payloads to provide Linux TCP attack.

VUnit is a unit testing framework for VHDL/SystemVerilog

A hypervisor written in Rust. A work in progress.

🏆Explore Android performance optimization in depth（continuous updating ...）

CAPCOM arcade hardware accurately replicated on MiST and MiSTer FPGA platforms. It covers Ghosts'n Goblins, 1942, 1943, Commando, F1-Dream, GunSmoke, Tiger Road, Black Tiger, Bionic Commando, Higemaru, Street Fighter and Vulgus.

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

Retro Z80 computer for the Pano Logic Thin Client

A Just-In-Time Compiler for Verilog from VMware Research

Fix for keyboard/mouse/tablet being detected as joystick in Linux

kernel module for taking block-level snapshots and incremental backups of Linux block devices

This is a higan/Verilator co-simulation example/framework

A refreshed Python toolbox for building complex digital hardware

A reimplementation of a tiny stack CPU

Tiny library to interface with ALSA in the Linux kernel

Haskell to VHDL/Verilog/SystemVerilog compiler

Linux Driver Template

A heavily commented linux kernel source code in Chinese.

A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set

Intermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)

A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.

Scots Army Knife for electronics

HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn

SweRV EL2 Core

An example rootkit that gives a userland process root permissions