All Projects → Vexriscv → Similar Projects or Alternatives

905 Open source projects that are alternatives of or similar to Vexriscv

RISC-V-TLM
RISC-V SystemC-TLM simulator
Stars: ✭ 125 (-87.99%)
Mutual labels:  riscv
Cv32e40p
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
Stars: ✭ 458 (-56%)
Mutual labels:  riscv
pygears
HW Design: A Functional Approach
Stars: ✭ 122 (-88.28%)
Mutual labels:  fpga
Scalene
Scalene: a high-performance, high-precision CPU, GPU, and memory profiler for Python
Stars: ✭ 4,819 (+362.92%)
Mutual labels:  cpu
Planeverb
Project Planeverb is a CPU based real-time wave-based acoustics engine for games. It comes with an integration with the Unity Engine.
Stars: ✭ 22 (-97.89%)
Mutual labels:  cpu
Aoocs
The OpenCores aoOCS SoC is a Wishbone compatible implementation of most of the Amiga Original Chip Set (OCS) and computer functionality. aoOCS is not related in any way with Minimig - it is a new and independent Amiga OCS implementation.
Stars: ✭ 23 (-97.79%)
Mutual labels:  verilog
Fwrisc
Featherweight RISC-V implementation
Stars: ✭ 39 (-96.25%)
Mutual labels:  verilog
folding-at-home
A Folding@Home Docker container with GPU support
Stars: ✭ 38 (-96.35%)
Mutual labels:  cpu
Upduino Ov7670 Camera
Design to connect Lattice Ultraplus FPGA to OV7670 Camera Module
Stars: ✭ 17 (-98.37%)
Mutual labels:  verilog
Nmigen
A refreshed Python toolbox for building complex digital hardware
Stars: ✭ 388 (-62.73%)
Mutual labels:  fpga
RunCat
🐈 🐈 🐈 Running Cat
Stars: ✭ 31 (-97.02%)
Mutual labels:  cpu
Computer-Architecture-Task-2
Riscv32 CPU Project
Stars: ✭ 43 (-95.87%)
Mutual labels:  cpu
Dsp Theory
Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.
Stars: ✭ 437 (-58.02%)
Mutual labels:  fpga
nativescript-performance-monitor
⚡ Proof your app maintains 60-ish FPS by collecting data or showing it on screen with this NativeScript plugin!
Stars: ✭ 21 (-97.98%)
Mutual labels:  cpu
Fftdemo
A demonstration showing how several components can be compsed to build a simulated spectrogram
Stars: ✭ 23 (-97.79%)
Mutual labels:  verilog
MC6809
Implementation of the MC6809 CPU in Python (Extracted from https://github.com/jedie/DragonPy project)
Stars: ✭ 24 (-97.69%)
Mutual labels:  cpu
Gcvideo
GameCube Digital AV converter
Stars: ✭ 385 (-63.02%)
Mutual labels:  vhdl
spector
Spector: An OpenCL FPGA Benchmark Suite
Stars: ✭ 38 (-96.35%)
Mutual labels:  fpga
sdram-controller
Generic FPGA SDRAM controller, originally made for AS4C4M16SA
Stars: ✭ 45 (-95.68%)
Mutual labels:  fpga
Sensors
A macOS application displaying the thermal, voltage and current sensor values.
Stars: ✭ 70 (-93.28%)
Mutual labels:  cpu
Hashvoodoo Fpga Bitcoin Miner
HashVoodoo FPGA Bitcoin Miner
Stars: ✭ 16 (-98.46%)
Mutual labels:  vhdl
Parallella Examples
Community created parallella projects
Stars: ✭ 384 (-63.11%)
Mutual labels:  vhdl
pcievhost
PCIe (1.0a to 2.0) Virtual host model for verilog
Stars: ✭ 22 (-97.89%)
Mutual labels:  verilog
Z80
Highly portable Zilog Z80 CPU emulator written in ANSI C
Stars: ✭ 131 (-87.42%)
Mutual labels:  cpu
Cgragenerator
Stars: ✭ 22 (-97.89%)
Mutual labels:  verilog
tracer
Renderer using C++, Embree and USD to achieve Path Tracing techniques on the CPU
Stars: ✭ 40 (-96.16%)
Mutual labels:  cpu
Firesim
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
Stars: ✭ 415 (-60.13%)
Mutual labels:  fpga
Ethernet 10ge mac sv uvm tb
SystemVerilog-based UVM testbench for an Ethernet 10GE MAC core
Stars: ✭ 39 (-96.25%)
Mutual labels:  verilog
vrcpu
Code, documentation, schematics, notes for my Ben Eater inspired breadboard computer and emulator
Stars: ✭ 98 (-90.59%)
Mutual labels:  cpu
Leflow
Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
Stars: ✭ 414 (-60.23%)
Mutual labels:  verilog
stereo-vision-fpga
Real-time binocular stereo vision FPGA system with OV5640 cameras
Stars: ✭ 20 (-98.08%)
Mutual labels:  fpga
ProjectOberon2013
Project Oberon (New Edition 2013) Unofficial Mirror
Stars: ✭ 92 (-91.16%)
Mutual labels:  verilog
Mips Cpu
MIPS CPU implemented in Verilog
Stars: ✭ 409 (-60.71%)
Mutual labels:  verilog
Riscv Megaproject
A series of (practise) projects of RISC-V cores. All cores will support at least the I instruction set. Expect bugs/limitations for earlier ones
Stars: ✭ 29 (-97.21%)
Mutual labels:  verilog
Zedboard audio
A Audio Interface for the Zedboard
Stars: ✭ 16 (-98.46%)
Mutual labels:  vhdl
Ilgpu
ILGPU JIT Compiler for high-performance .Net GPU programs
Stars: ✭ 374 (-64.07%)
Mutual labels:  cpu
libelas-gpu
Implementation of LIBELAS in cuda.
Stars: ✭ 41 (-96.06%)
Mutual labels:  cpu
Y86
A Y86 pipeline CPU simulator in JavaScript.
Stars: ✭ 404 (-61.19%)
Mutual labels:  cpu
Lenet accelerator
A Lenet ASIC Accelerator targeting minimum number of cycles
Stars: ✭ 17 (-98.37%)
Mutual labels:  verilog
Stats
macOS system monitor in your menu bar
Stars: ✭ 7,134 (+585.3%)
Mutual labels:  cpu
The Hack General Purpose Computer
Using HDL, from Boolean algebra and elementary logic gates to building a Central Processing Unit, a memory system, and a hardware platform, leading up to a 16-bit general-purpose computer. Then, implementing the modern software hierarchy designed to enable the translation and execution of object-based, high-level languages on a bare-bone computer hardware platform; Including Virtual machine,Compiler and Operating system.
Stars: ✭ 39 (-96.25%)
Mutual labels:  cpu
A500 8mb Fastram
8MB FastRAM Board for the Amiga 500 & Amiga 500+
Stars: ✭ 28 (-97.31%)
Mutual labels:  verilog
Nexys4ddr
Stars: ✭ 16 (-98.46%)
Mutual labels:  vhdl
Pulp Dronet
A deep learning-powered visual navigation engine to enables autonomous navigation of pocket-size quadrotor - running on PULP
Stars: ✭ 374 (-64.07%)
Mutual labels:  riscv
Scaffold
Donjon hardware tool for circuits security evaluation
Stars: ✭ 43 (-95.87%)
Mutual labels:  vhdl
pyVHDLParser
Streaming based VHDL parser.
Stars: ✭ 51 (-95.1%)
Mutual labels:  vhdl
Parallella Hw
Parallella board design files
Stars: ✭ 389 (-62.63%)
Mutual labels:  vhdl
Verilog Vga Controller
A very simple VGA controller written in verilog
Stars: ✭ 16 (-98.46%)
Mutual labels:  verilog
e-verest
EVEREST: e-Versatile Research Stick for peoples
Stars: ✭ 21 (-97.98%)
Mutual labels:  fpga
Curso-Electronica-Digital-para-makers-con-FPGAs-Libres
Curso de 35h sobre el diseño de sistemas digitales usando FPGAs libres, orientado para makers
Stars: ✭ 17 (-98.37%)
Mutual labels:  fpga
Fpga Accelerator For Aes Lenet Vgg16
FPGA/AES/LeNet/VGG16
Stars: ✭ 28 (-97.31%)
Mutual labels:  verilog
Kimera Semantics
Real-Time 3D Semantic Reconstruction from 2D data
Stars: ✭ 368 (-64.65%)
Mutual labels:  cpu
Fpga Sram
mystorm sram test
Stars: ✭ 16 (-98.46%)
Mutual labels:  verilog
Pidusage
Cross-platform process cpu % and memory usage of a PID
Stars: ✭ 364 (-65.03%)
Mutual labels:  cpu
K1801
1801 series ULA reverse engineering
Stars: ✭ 16 (-98.46%)
Mutual labels:  verilog
Serv
SERV - The SErial RISC-V CPU
Stars: ✭ 358 (-65.61%)
Mutual labels:  verilog
Netlist Graph
Java library for parsing and manipulating graph representations of gate-level Verilog netlists
Stars: ✭ 7 (-99.33%)
Mutual labels:  verilog
Trisycl
Generic system-wide modern C++ for heterogeneous platforms with SYCL from Khronos Group
Stars: ✭ 354 (-65.99%)
Mutual labels:  fpga
Hw
RTL, Cmodel, and testbench for NVDLA
Stars: ✭ 1,041 (+0%)
Mutual labels:  verilog
Corefreq
CoreFreq is a CPU monitoring software designed for the 64-bits Processors.
Stars: ✭ 1,026 (-1.44%)
Mutual labels:  cpu
301-360 of 905 similar projects