19 open source projects by pulp-platform

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

Common SystemVerilog components

RISC-V manycore accelerator for HERO, bigPULP hardware platform

Ariane SDK containing RISC-V tools and Buildroot

An open-source microcontroller system based on RISC-V

A deep learning-powered visual navigation engine to enables autonomous navigation of pocket-size quadrotor - running on PULP

⛔ DEPRECATED ⛔ HERO Software Development Kit

The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 0.10, working as a coprocessor to CORE-V's CVA6 core

Lean but mean RISC-V system!

No description, website, or topics provided.

No description, website, or topics provided.

No description, website, or topics provided.

pulp_soc is the core building component of PULP based SoCs

No description, website, or topics provided.

NEural Minimizer for pytOrch

No description, website, or topics provided.