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Top 2 asic-design open source projects

Quasar 2.0: Chisel equivalent of SweRV-EL2

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scala SystemVerilog perl c Verilog C++processor chisel riscv rtl chisel3 open-source-hardware verilator asic-verification axi4 ahb-lite asic-design swerv swerv-el2

Standard Cell Library based Memory Compiler using FF/Latch cells

✭ 54

Verilog python verilog vlsi vlsi-physical-design vlsi-circuits electronics-design asic-design

1-2 of 2 asic-design projects