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Top 9 chisel3 open source projects

Chisel 3: A Modern Hardware Design Language

✭ 2,290

scala verilog rtl chip-generator chisel chisel3 firrtl

Quasar 2.0: Chisel equivalent of SweRV-EL2

✭ 19

scala SystemVerilog perl c Verilog C++processor chisel riscv rtl chisel3 open-source-hardware verilator asic-verification axi4 ahb-lite asic-design swerv swerv-el2

Chisel Things for OFDM

✭ 23

scala python C++shell Makefile assembly Verilog chip-generator chisel rtl chisel3 firrtl verilog

Provides dot visualizations of chisel/firrtl circuits

✭ 76

scala shell visualization chisel chisel3 firrtl

Documentatin for YatCPU

✭ 15

The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.

✭ 37

scala SystemVerilog tcl python assembly Makefile shell fpga intel chisel riscv chisel3 altera risc-v rv32i avalon-mm

Yet another toy CPU.

✭ 42

scala tcl c python Verilog C++cpu riscv chisel3 risc-v chisel-generator

Lectures for the Agile Hardware Design course in Jupyter Notebooks

✭ 42

Jupyter Notebook scala shell jupyter chisel3 agile-hardware

The next generation integrated development environment for processor design and verification. It has multi-hardware language support, open source IP management and easy-to-use rtl simulation toolset.

✭ 79

javascript Vue HTML webgl processor ide waveform riscv chisel3 verilog vscode-extension simualtion

1-9 of 9 chisel3 projects