Top 4 rv32i open source projects

KyogenRV
The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.
rv32i-sim
RISC-V Software Simulation
steel-core
Processor core implementing the base RV32I instruction set of the RISC-V ISA
spu32
Small Processing Unit 32: A compact RV32I CPU written in Verilog
1-4 of 4 rv32i projects