506 Open source projects that are alternatives of or similar to PandA-bambu

FPGA/hardware design of openwifi

HLS branch of Halide

Recipe for FPGA cooking

A scalable High-Level Synthesis framework on MLIR

Machine learning in FPGAs using HLS

HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn

open-source IEEE 802.11 WiFi baseband FPGA (chip) design

A Vivado HLS Command Line Helper Tool

Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

中文版 Parallel Programming for FPGAs

🎯 soap - Structural Optimisation of Arithmetic Programs

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

Polyphony is Python based High-Level Synthesis compiler.

Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack

Upduino v2 with the ice40 up5k FPGA demos

This tool translates synthesizable SystemC code to synthesizable SystemVerilog.

IPFS Streaming Video

Intel 8080-based Space Invaders arcade machine implemented on an FPGA, written in CLaSH

IIoT-SPYN gives users the ability to control, monitor, capture data, visualize and analyze industrial grade motors

Very simple low latency live platform prototype

Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA

Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)

ROS 2 Hardware Acceleration Working Group community governance model & list of projects

SpinalHDL - Cryptography libraries

A flexible framework for analyzing and transforming FPGA netlists. Official repository.

FPGA-based JPEG-LS image compressor.

🔉 Nginx module that generates audio track for HTTP Live Streaming (HLS) streams on the fly.

OpenCL HLS based CNN Accelerator on Intel DE10 Nano FPGA.

A formally verified high-level synthesis tool based on CompCert and written in Coq.

HLS playback plugin for videojs

DMA source and sink blocks for Xilinx Zynq FPGAs

Drop In USB CDC ACM core for iCE40 FPGA

Ghi chép về Livestream sử dụng Opensource - Xây dựng một máy chủ Livestream theo cách đơn giản nhất - NGINX RTMP Dockerfile

This repo is for ECE44x (Fall2015-Spring2016)

Simulation of the classic Pacman arcade game on a PanoLogic thin client.

AV Playout in Flutter

No description or website provided.

Clash implementation of the Compucolor II home computer

HLS MPEG-TS parser library in Javascript

Node.js Readable for retrieving HLS segments.

SystemOT, yet another home brew cpu.

Yet Another RISC-V Implementation

Chisel components for FPGA projects

Install Intel FPGA 'Quartus Prime' software on remote servers

The templates of the emrah-buster installer.

Generator of verilog description for FPGA MobileNet implementation

WebRTC/RTSP/RTMP/HTTP/HLS/HTTP-FLV/WebSocket-FLV/HTTP-TS/HTTP-fMP4/WebSocket-TS/WebSocket-fMP4/GB28181/SRT server and client framework based on C++11

Dockerfile with Vivado for CI

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

VT220-compatible console on Cyclone IV EP4CE55F23I7

Tool for ripping m3u8 playlists/segments.

Schematic symbol libraries for FPGAs & microcontrollers.

An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.

AutoSA: Polyhedral-Based Systolic Array Compiler

MOS6581 SID chip emulator in SystemVerilog

A web player with shakaplayer & hls.js both supported

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

The Kria Robotics Stack (KRS) is a ROS 2 superset for industry, an integrated set of robot libraries and utilities to accelerate the development, maintenance and commercialization of industrial-grade robotic solutions while using adaptive computing.

Dockerized FPGA toolchain experiments