formal hw verificationTrying to verify Verilog/VHDL designs with formal methods and tools
Stars: ✭ 32 (-37.25%)
PLBARTOfficial code of our work, Unified Pre-training for Program Understanding and Generation [NAACL 2021].
Stars: ✭ 151 (+196.08%)
CacheSimple implementation of cache using VHDL
Stars: ✭ 17 (-66.67%)
Forth CpuA Forth CPU and System on a Chip, based on the J1, written in VHDL
Stars: ✭ 244 (+378.43%)
language-plannerOfficial Code for "Language Models as Zero-Shot Planners: Extracting Actionable Knowledge for Embodied Agents"
Stars: ✭ 84 (+64.71%)
Awesome Model QuantizationA list of papers, docs, codes about model quantization. This repo is aimed to provide the info for model quantization research, we are continuously improving the project. Welcome to PR the works (papers, repositories) that are missed by the repo.
Stars: ✭ 200 (+292.16%)
mlmachine learning
Stars: ✭ 29 (-43.14%)
cscgCode Generation as a Dual Task of Code Summarization.
Stars: ✭ 28 (-45.1%)
UvvmUVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/
Stars: ✭ 191 (+274.51%)
SiaFpgaMinerVHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin
Stars: ✭ 58 (+13.73%)
DegateOpen source software for chip reverse engineering.
Stars: ✭ 156 (+205.88%)
symbolatorHDL symbol generator
Stars: ✭ 123 (+141.18%)
TinytpuImplementation of a Tensor Processing Unit for embedded systems and the IoT.
Stars: ✭ 153 (+200%)
mlp-gpt-jaxA GPT, made only of MLPs, in Jax
Stars: ✭ 53 (+3.92%)
FletcherFletcher: A framework to integrate FPGA accelerators with Apache Arrow
Stars: ✭ 144 (+182.35%)
yavhdlYet Another VHDL tool
Stars: ✭ 29 (-43.14%)
OsvvmOSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...
Stars: ✭ 140 (+174.51%)
dasher-webDasher text entry in HTML, CSS, JavaScript, and SVG
Stars: ✭ 34 (-33.33%)
Fmcw3Two RX-channel 6 GHz FMCW radar design files
Stars: ✭ 126 (+147.06%)
BenEaterVHDLVHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)
Stars: ✭ 30 (-41.18%)
Neo430A very small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
Stars: ✭ 120 (+135.29%)
gpt-j-apiAPI for the GPT-J language model 🦜. Including a FastAPI backend and a streamlit frontend
Stars: ✭ 248 (+386.27%)
ZpuThe Zylin ZPU
Stars: ✭ 118 (+131.37%)
lm-scorer📃Language Model based sentences scoring library
Stars: ✭ 264 (+417.65%)
Artix 7 Hdmi ProcessingReceiving and processing 1080p HDMI audio and video on the Artix 7 FPGA
Stars: ✭ 113 (+121.57%)
tying-wv-and-wcImplementation for "Tying Word Vectors and Word Classifiers: A Loss Framework for Language Modeling"
Stars: ✭ 39 (-23.53%)
Cosmos Plus OpenssdCosmos OpenSSD + Hardware and Software source distribution
Stars: ✭ 110 (+115.69%)
verilog-vcd-parserA parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.
Stars: ✭ 46 (-9.8%)
Vhdl ExtrasFlexible VHDL library
Stars: ✭ 109 (+113.73%)
gdcCode for the ICLR 2021 paper "A Distributional Approach to Controlled Text Generation"
Stars: ✭ 94 (+84.31%)
Hdl checkerRepurposing existing HDL tools to help writing better code
Stars: ✭ 103 (+101.96%)
xedaCross EDA Abstraction and Automation
Stars: ✭ 25 (-50.98%)
Xjtu TriplerThis repository is the backup of XJTU-Tripler project, participating dac19 system design contest
Stars: ✭ 98 (+92.16%)
CharLMCharacter-aware Neural Language Model implemented by PyTorch
Stars: ✭ 32 (-37.25%)
TpuTPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. Designed to run on miniSpartan6+.
Stars: ✭ 91 (+78.43%)
OpenNASOpenN@S: Open-source software to NAS automatic VHDL code generation
Stars: ✭ 15 (-70.59%)
GhdlVHDL 2008/93/87 simulator
Stars: ✭ 1,285 (+2419.61%)
VHDLFormatterVHDL formatter web online written in typescript
Stars: ✭ 44 (-13.73%)
GretaGRETA expansion board for the Amiga 500 computer with Fast RAM, microSD mass storage and Ethernet controller, powered by FPGA technology.
Stars: ✭ 84 (+64.71%)
Word-Prediction-NgramNext Word Prediction using n-gram Probabilistic Model with various Smoothing Techniques
Stars: ✭ 25 (-50.98%)
ZynqbtcA Bitcoin miner for the Zynq chip utilizing the Zedboard.
Stars: ✭ 74 (+45.1%)
fpga torture🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
Stars: ✭ 23 (-54.9%)
J1scA reimplementation of a tiny stack CPU
Stars: ✭ 64 (+25.49%)
asr2424-hour Automatic Speech Recognition
Stars: ✭ 27 (-47.06%)
Q2727-Queens Puzzle: Massively Parellel Enumeration and Solution Counting
Stars: ✭ 60 (+17.65%)
vscode-terosHDLVHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
Stars: ✭ 325 (+537.25%)
MinTLMinTL: Minimalist Transfer Learning for Task-Oriented Dialogue Systems
Stars: ✭ 61 (+19.61%)
CodeT5Code for CodeT5: a new code-aware pre-trained encoder-decoder model.
Stars: ✭ 390 (+664.71%)
FNet-pytorchUnofficial implementation of Google's FNet: Mixing Tokens with Fourier Transforms
Stars: ✭ 204 (+300%)
open clipAn open source implementation of CLIP.
Stars: ✭ 1,534 (+2907.84%)
vboardVirtual development board for HDL design
Stars: ✭ 32 (-37.25%)
pd3f🏭 PDF text extraction pipeline: self-hosted, local-first, Docker-based
Stars: ✭ 132 (+158.82%)