Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.

Stars: ✭ 43 (-79.02%)

Mutual labels: fpga, dsp, verilog

newsched

The GNU Radio 4.0 Runtime Proof Of Concept

Stars: ✭ 19 (-90.73%)

Mutual labels: radio, dsp, sdr

Openwifi

open-source IEEE 802.11 WiFi baseband FPGA (chip) design

Stars: ✭ 2,257 (+1000.98%)

Mutual labels: verilog, fpga, sdr

UA3REO-DDC-Transceiver

DDC/DUC SDR Tranceiver project

Stars: ✭ 93 (-54.63%)

Mutual labels: fpga, dsp, sdr

nfc-laboratory

NFC signal and protocol analyzer using SDR receiver

Stars: ✭ 41 (-80%)

Mutual labels: radio, dsp, sdr

Beagle sdr gps

KiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS

Stars: ✭ 300 (+46.34%)

Mutual labels: verilog, fpga, sdr

Openwifi Hw

FPGA/hardware design of openwifi

Stars: ✭ 181 (-11.71%)

Mutual labels: verilog, fpga, sdr

Mips Cpu

A MIPS CPU implemented in Verilog

Stars: ✭ 38 (-81.46%)

Mutual labels: verilog, fpga

Rsyocto

🤖 SoCFPGA: Open Source embedded Linux developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)

Stars: ✭ 41 (-80%)

Mutual labels: verilog, fpga

Verilog Generator Of Neural Net Digit Detector For Fpga

Verilog Generator of Neural Net Digit Detector for FPGA

Stars: ✭ 187 (-8.78%)

Mutual labels: verilog, fpga

Wb2axip

Bus bridges and other odds and ends

Stars: ✭ 177 (-13.66%)

Mutual labels: verilog, fpga

Hrm Cpu

Human Resource Machine - CPU Design #HRM

Stars: ✭ 43 (-79.02%)

Mutual labels: verilog, fpga

Wbscope

A wishbone controlled scope for FPGA's

Stars: ✭ 50 (-75.61%)

Mutual labels: verilog, fpga

Electron

A mixed signal netlist language (pre-alpha)

Stars: ✭ 52 (-74.63%)

Mutual labels: verilog, fpga

Fpga readings

Recipe for FPGA cooking

Stars: ✭ 164 (-20%)

Mutual labels: verilog, fpga

Pysdr

A guide for using Python as a software-defined radio (SDR) framework, for extremely rapid development of SDR apps/research with beautiful GUIs

Stars: ✭ 60 (-70.73%)

Mutual labels: dsp, sdr

Core jpeg

High throughput JPEG decoder in Verilog for FPGA

Stars: ✭ 64 (-68.78%)

Mutual labels: verilog, fpga

Symbiflow Examples

Example designs showing different ways to use SymbiFlow toolchains.

Stars: ✭ 71 (-65.37%)

Mutual labels: verilog, fpga

Rggen

Code generation tool for configuration and status registers

Stars: ✭ 54 (-73.66%)

Mutual labels: verilog, fpga

J1sc

A reimplementation of a tiny stack CPU

Stars: ✭ 64 (-68.78%)

Mutual labels: verilog, fpga

Gr Nrsc5

A GNU Radio implementation of HD Radio (NRSC-5)

Stars: ✭ 73 (-64.39%)

Mutual labels: radio, sdr

Look4sat

Amateur radio and weather satellite tracker and passes predictor for Android inspired by Gpredict

Stars: ✭ 160 (-21.95%)

Mutual labels: radio, sdr

Higan Verilog

This is a higan/Verilator co-simulation example/framework

Stars: ✭ 35 (-82.93%)

Mutual labels: verilog, fpga

Image Processing

Image Processing Toolbox in Verilog using Basys3 FPGA

Stars: ✭ 31 (-84.88%)

Mutual labels: verilog, fpga

Fpga Chip8

CHIP-8 console on FPGA

Stars: ✭ 169 (-17.56%)

Mutual labels: verilog, fpga

Clash Compiler

Haskell to VHDL/Verilog/SystemVerilog compiler

Stars: ✭ 958 (+367.32%)

Mutual labels: verilog, fpga

Vexriscv

A FPGA friendly 32 bit RISC-V CPU implementation

Stars: ✭ 1,041 (+407.8%)

Mutual labels: verilog, fpga

Fpga Fft

A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

Stars: ✭ 45 (-78.05%)

Mutual labels: fpga, dsp

Darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Stars: ✭ 1,062 (+418.05%)

Mutual labels: verilog, fpga

Icestudio

❄️ Visual editor for open FPGA boards

Stars: ✭ 958 (+367.32%)

Mutual labels: verilog, fpga

Airspy Fmradion

Software decoder for FM/AM broadcast radio with AirSpy R2 / Mini, Airspy HF+, and RTL-SDR

Stars: ✭ 59 (-71.22%)

Mutual labels: radio, sdr

Rfsec Toolkit

RFSec-ToolKit is a collection of Radio Frequency Communication Protocol Hacktools.无线通信协议相关的工具集，可借助SDR硬件+相关工具对无线通信进行研究。Collect with ♥ by HackSmith

Stars: ✭ 1,085 (+429.27%)

Mutual labels: radio, sdr

Gr Adsb

GNU Radio OOT module for demodulating and decoding ADS-B packets

Stars: ✭ 61 (-70.24%)

Mutual labels: dsp, sdr

Fpga101 Workshop

FPGA 101 - Workshop materials

Stars: ✭ 54 (-73.66%)

Mutual labels: verilog, fpga

Limesdr workshop

Intro to software-defined radio with LimeSDR workshop

Stars: ✭ 68 (-66.83%)

Mutual labels: dsp, sdr

Jt gng

CAPCOM arcade hardware accurately replicated on MiST and MiSTer FPGA platforms. It covers Ghosts'n Goblins, 1942, 1943, Commando, F1-Dream, GunSmoke, Tiger Road, Black Tiger, Bionic Commando, Higemaru, Street Fighter and Vulgus.

Stars: ✭ 65 (-68.29%)

Mutual labels: verilog, fpga

Adsb Out

📶 1090ES ADS-B Out Add-on

Stars: ✭ 74 (-63.9%)

Mutual labels: radio, sdr

Iroha

Intermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)

Stars: ✭ 30 (-85.37%)

Mutual labels: verilog, fpga

Soapy power

Obtain power spectrum from SoapySDR devices (RTL-SDR, Airspy, SDRplay, HackRF, bladeRF, USRP, LimeSDR, etc.)