326 Open source projects that are alternatives of or similar to s6soc

🔑 Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.

328eForth for Arduino with mods for coinForth

Project X-Ray Database: XC7 Series

Transient Array Radio Telescope

An example of how to use the Xilinx ISE toolchain from the command line

An open-source VHDL library for FPGA design.

zedboard上基于FPGA+ARM的人脸识别智能监控系统。关键词：linux，zedboard，arm，fpga，人脸检测，人脸识别。

FPGA based USB 2.0 high speed audio interface featuring multiple optical ADAT inputs and outputs

Clash implementation of the Compucolor II home computer

A flexible framework for analyzing and transforming FPGA netlists. Official repository.

Mostly AVR compatible FPGA soft-core

PhyWhisperer-USB: Hardware USB Trigger

FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope

usb-jtag - Altera USB Blaster Emulation with a FX2

Vivado and PetaLinux projects for Zynq EBAZ4205 Board

PandA-bambu public repository

Robotic Application Processor

This repository contains synthesizable examples which use the PoC-Library.

Generator of verilog description for FPGA MobileNet implementation

Library of approximate arithmetic circuits

Project F brings FPGAs to life with exciting open-source designs you can build on.

Web-based HDL diagramming tool

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

IIoT-SPYN gives users the ability to control, monitor, capture data, visualize and analyze industrial grade motors

Antmicro's fast, vendor-neutral DMA IP in Chisel

Chisel components for FPGA projects

FPGA-based USB-device controller to implement USB-CDC, USB-HID, etc.

The Kria Robotics Stack (KRS) is a ROS 2 superset for industry, an integrated set of robot libraries and utilities to accelerate the development, maintenance and commercialization of industrial-grade robotic solutions while using adaptive computing.

A low cost FPGA development board for absolute newbies

DMA source and sink blocks for Xilinx Zynq FPGAs

PYNQ example of using the RFSoC as a QPSK transceiver.

ROS 2 Hardware Acceleration Working Group community governance model & list of projects

Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.

AutoSA: Polyhedral-Based Systolic Array Compiler

Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom

microcontroller-based FPGA / JTAG programmer

Spector: An OpenCL FPGA Benchmark Suite

Common elements for FPGA Design (FIFOs, RAMs, etc.)

FPGA-based JPEG-LS image compressor.

EVEREST: e-Versatile Research Stick for peoples

OpenCL HLS based CNN Accelerator on Intel DE10 Nano FPGA.

FPGA CryptoNight V7 Minner

Intel 8080-based Space Invaders arcade machine implemented on an FPGA, written in CLaSH

Curso de 35h sobre el diseño de sistemas digitales usando FPGAs libres, orientado para makers

Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA

An experiment for building gateware for the axiom micro / beta using nmigen and yosys

Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)

A FPGA implementation of the NTP and NTS protocols

A scalable High-Level Synthesis framework on MLIR

SystemOT, yet another home brew cpu.

mirror of https://git.elphel.com/Elphel/eddr3

Dockerfile with Vivado for CI

An FPGA implementation of a classic 80ies speech synthesizer. Done for the Retro Challenge 2017/10.

Schematic symbol libraries for FPGAs & microcontrollers.

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.

Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.

Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.

Haskell library for hardware description

Quasar 2.0: Chisel equivalent of SweRV-EL2

Fast inference of Boosted Decision Trees in FPGAs