All Git Users → ZipCPU

17 open source projects by ZipCPU

[ Open user page on Github ]

1. Wb2axip

Bus bridges and other odds and ends

✭ 177

verilog fpga gplv3

2. Wbuart32

A simple, basic, formally verified UART controller

✭ 133

verilog fpga serialport

3. Autofpga

A utility for Composing FPGA designs from Peripherals

✭ 108

verilog fpga

4. Vgasim

A Video display simulator

✭ 94

video verilog fpga gplv3

5. Wbscope

A wishbone controlled scope for FPGA's

✭ 50

verilog fpga

6. Zbasic

A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems

✭ 27

verilog fpga

7. Fftdemo

A demonstration showing how several components can be compsed to build a simulated spectrogram

✭ 23

verilog

8. Zipcpu

A small, light weight, RISC CPU soft core

✭ 640

verilog fpga cpu cross-compiler

9. s6soc

CMod-S6 SoC

✭ 30

Verilog c C++assembly Makefile perl objective c fpga fpga-soc wishbone verilator zipcpu wishbone-bus

10. sdr

A basic Soft(Gate)ware Defined Radio architecture

✭ 34

Verilog C++Makefile OpenSCAD perl shell

11. dpll

A collection of phase locked loop (PLL) related projects

✭ 55

Verilog C++matlab Makefile shell fpga gplv3 verilog verilator pll

12. wbi2c

Wishbone controlled I2C controllers

✭ 25

Verilog C++Lex Makefile c shell assembly fpga i2c gplv3 verilog verilator i2c-slave wishbone-bus i2c-master

13. dblclockfft

A configurable C++ generator of pipelined Verilog FFT cores

✭ 147

C++Verilog Makefile c fpga gplv3 verilog fft verilog-components verilator

14. openarty

An Open Source configuration of the Arty platform

✭ 93

Verilog C++Coq c Makefile shell fpga fpga-soc wishbone verilator arty zipcpu wishbone-bus

15. arrowzip

A ZipCPU based demonstration of the MAX1000 FPGA board

✭ 17

Verilog C++c Makefile OpenSCAD objective c

16. icozip

A ZipCPU demonstration port for the icoboard

✭ 15

Verilog C++c Makefile objective c shell perl

17. dbgbus

A collection of debugging busses developed and presented at zipcpu.com

✭ 24

Verilog C++Makefile c shell verilog debugging-tools wishbone fgpa verilator wishbone-bus

1-17 of 17 user projects