1. OscprepoA list of commands, scripts, resources, and more that I have gathered and attempted to consolidate for use as OSCP (and more) study material. Commands in 'Usefulcommands' Keepnote. Bookmarks and reading material in 'BookmarkList' CherryTree. Reconscan Py2 and Py3. Custom ISO building.
2. BookA textbook on informal homotopy type theory
4. CoqCoq is a formal proof management system. It provides a formal language to write mathematical definitions, executable algorithms and theorems together with an environment for semi-interactive development of machine-checked proofs.
6. ynotThe Ynot Project source code.
7. corespecA Specification for Dependent Types in Haskell (Core)
8. pcreNo description, website, or topics provided.
9. topologyGeneral topology in Coq [maintainers=@amiloradovsky,@Columbus240,@stop-cran]
14. CoqASTFun plugin to play with the Gallina AST.
16. Set-TheoryCoq encoding of ZFC and formalization of the textbook Elements of Set Theory
17. InfSeqExtA Coq library for reasoning (co)inductively on infinite sequences using LTL-like modal operators
22. AbelA proof of Abel-Ruffini theorem.
30. chaparA framework for verification of causal consistency for distributed key-value stores and their clients in Coq [maintainer=@palmskog]
31. claferClafer is a lightweight modeling language
32. finmapFinite sets, finite maps, multisets and generic sets
34. why3SPARK 2014 repository for the Why3 verification platform.
37. bedrockCoq library for verified low-level programming
40. ipgenIP-core package generator for AXI4/Avalon
41. marlowePrototype implementation of domain-specific language for the design of smart-contracts over cryptocurrencies
42. gaiaImplementation of books from Bourbaki's Elements of Mathematics in Coq [maintainer=@thery]
43. coqfjA mechanized proof of type safety for Featherweight Java using Coq
45. pipcoreNo description, website, or topics provided.
47. vglLow-level graphics access for V
48. pl2016No description, website, or topics provided.
49. RISCV CPUA FPGA supported RISC-V CPU with 5-stage pipeline implemented in Verilog HDL