GitPlanet

Cheap and reliable Node.js hosting starts at $3/month, and $1/month static HTML hosting

Created with love in Canada, visit hostnodejs.com today

Feel like to post an Ad? Learn Details
All Projects → antonblanchard → Microwatt

antonblanchard / Microwatt

Licence: other
A tiny Open POWER ISA softcore written in VHDL 2008

Labels

verilogvhdlprocessor

Projects that are alternatives of or similar to Microwatt

vboard
Virtual development board for HDL design
Stars: ✭ 32 (-91.64%)
Mutual labels:  vhdl, verilog
cocotb-bus
Pre-packaged testbenching tools and reusable bus interfaces for cocotb
Stars: ✭ 20 (-94.78%)
Mutual labels:  vhdl, verilog
vim-hdl
Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)
Stars: ✭ 59 (-84.6%)
Mutual labels:  vhdl, verilog
xeda
Cross EDA Abstraction and Automation
Stars: ✭ 25 (-93.47%)
Mutual labels:  vhdl, verilog
docker
Scripts to build and use docker images including GHDL
Stars: ✭ 27 (-92.95%)
Mutual labels:  vhdl, verilog
verilog-vcd-parser
A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.
Stars: ✭ 46 (-87.99%)
Mutual labels:  vhdl, verilog
symbolator
HDL symbol generator
Stars: ✭ 123 (-67.89%)
Mutual labels:  vhdl, verilog
fpga-docker
Tools for running FPGA vendor toolchains with Docker
Stars: ✭ 54 (-85.9%)
Mutual labels:  vhdl, verilog
hwt
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
Stars: ✭ 145 (-62.14%)
Mutual labels:  vhdl, verilog
getting-started
List of ideas for getting started with TimVideos projects
Stars: ✭ 50 (-86.95%)
Mutual labels:  vhdl, verilog
vscode-terosHDL
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
Stars: ✭ 325 (-15.14%)
Mutual labels:  vhdl, verilog
Edalize
An abstraction library for interfacing EDA tools
Stars: ✭ 270 (-29.5%)
Mutual labels:  verilog, vhdl
tree-core-ide
The next generation integrated development environment for processor design and verification. It has multi-hardware language support, open source IP management and easy-to-use rtl simulation toolset.
Stars: ✭ 79 (-79.37%)
Mutual labels:  processor, verilog
SpinalCrypto
SpinalHDL - Cryptography libraries
Stars: ✭ 36 (-90.6%)
Mutual labels:  vhdl, verilog
SpinalDev
Docker Development Environment for SpinalHDL
Stars: ✭ 17 (-95.56%)
Mutual labels:  vhdl, verilog
formal hw verification
Trying to verify Verilog/VHDL designs with formal methods and tools
Stars: ✭ 32 (-91.64%)
Mutual labels:  vhdl, verilog
Tinytpu
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
Stars: ✭ 153 (-60.05%)
Mutual labels:  verilog, vhdl
Degate
Open source software for chip reverse engineering.
Stars: ✭ 156 (-59.27%)
Mutual labels:  verilog, vhdl
math
Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
Stars: ✭ 15 (-96.08%)
Mutual labels:  vhdl, verilog
intfftk
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
Stars: ✭ 43 (-88.77%)
Mutual labels:  vhdl, verilog
View All Similar Projects ➔

Microwatt

Microwatt

A tiny Open POWER ISA softcore written in VHDL 2008. It aims to be simple and easy to understand.

Simulation using ghdl

MicroPython running on Microwatt

You can try out Microwatt/Micropython without hardware by using the ghdl simulator. If you want to build directly for a hardware target board, see below.

  • Build micropython. If you aren't building on a ppc64le box you will need a cross compiler. If it isn't available on your distro grab the powerpc64le-power8 toolchain from https://toolchains.bootlin.com. You may need to set the CROSS_COMPILE environment variable to the prefix used for your cross compilers. The default is powerpc64le-linux-gnu-.
git clone https://github.com/micropython/micropython.git
cd micropython
cd ports/powerpc
make -j$(nproc)
cd ../../../

A prebuilt micropython image is also available in the micropython/ directory.

  • Microwatt uses ghdl for simulation. Either install this from your distro or build it. Microwatt requires ghdl to be built with the LLVM or gcc backend, which not all distros do (Fedora does, Debian/Ubuntu appears not to). ghdl with the LLVM backend is likely easier to build.

    If building ghdl from scratch is too much for you, the microwatt Makefile supports using Docker or Podman.

  • Next build microwatt:

git clone https://github.com/antonblanchard/microwatt
cd microwatt
make

To build using Docker:

make DOCKER=1

and to build using Podman:

make PODMAN=1
  • Link in the micropython image:
ln -s ../micropython/ports/powerpc/build/firmware.bin main_ram.bin

Or if you were using the pre-built image:

ln -s micropython/firmware.bin main_ram.bin
  • Now run microwatt, sending debug output to /dev/null:
./core_tb > /dev/null

Synthesis on Xilinx FPGAs using Vivado

  • Install Vivado (I'm using the free 2019.1 webpack edition).

  • Setup Vivado paths:

source /opt/Xilinx/Vivado/2019.1/settings64.sh
  • Install FuseSoC:
pip3 install --user -U fusesoc

Fedora users can get FuseSoC package via

sudo dnf copr enable sharkcz/danny
sudo dnf install fusesoc
  • Create a working directory and point FuseSoC at microwatt:
mkdir microwatt-fusesoc
cd microwatt-fusesoc
fusesoc library add microwatt /path/to/microwatt/
  • Build using FuseSoC. For hello world (Replace nexys_video with your FPGA board such as --target=arty_a7-100):
fusesoc run --target=nexys_video microwatt --memory_size=16384 --ram_init_file=/path/to/microwatt/fpga/hello_world.hex

You should then be able to see output via the serial port of the board (/dev/ttyUSB1, 115200 for example assuming standard clock speeds). There is a know bug where initial output may not be sent - try the reset (not programming button) on your board if you don't see anything.

  • To build micropython (currently requires 1MB of BRAM eg an Artix-7 A200):
fusesoc run --target=nexys_video microwatt

Testing

  • A simple test suite containing random execution test cases and a couple of micropython test cases can be run with:
make -j$(nproc) check

Issues

This is functional, but very simple. We still have quite a lot to do:

  • There are a few instructions still to be implemented
  • Need to add caches and bypassing (in progress)
  • Need to add supervisor state (in progress)
Note that the project description data, including the texts, logos, images, and/or trademarks, for each open source project belongs to its rightful owner. If you wish to add or remove any projects, please contact us at [email protected].