143 Open source projects that are alternatives of or similar to A2i

GRETA expansion board for the Amiga 500 computer with Fast RAM, microSD mass storage and Ethernet controller, powered by FPGA technology.

27-Queens Puzzle: Massively Parellel Enumeration and Solution Counting

Receiving and processing 1080p HDMI audio and video on the Artix 7 FPGA

TPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. Designed to run on miniSpartan6+.

Donjon hardware tool for circuits security evaluation

A very small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

Fletcher: A framework to integrate FPGA accelerators with Apache Arrow

SPI master and slave for FPGA written in VHDL

Flexible VHDL library

This repository is the backup of XJTU-Tripler project, participating dac19 system design contest

Digital FM Radio Receiver for FPGA

Two RX-channel 6 GHz FMCW radar design files

VHDL 2008/93/87 simulator

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

A Bitcoin miner for the Zynq chip utilizing the Zedboard.

The Zylin ZPU

A reimplementation of a tiny stack CPU

UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/

Caffe to VHDL

Cosmos OpenSSD + Hardware and Software source distribution

ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 architecture, now changed to RISC-V ISA.

OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...

Example code for the Numato Opsis board, the first HDMI2USB production board.

Repurposing existing HDL tools to help writing better code

A VHDL frontend for Yosys

Ophidian's Mirror Repository on github. https://gitlab.com/eclufsc/eda/ophidian

Component video modification for the C64 8-bit computer

Tri-mode (10/100/1000) full-duplex FPGA ethernet MAC in VHDL

A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.

A pipelined RISCV implementation in VHDL

VHDL library 4 FPGAs

Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project

An implementation of DisplayPort protocol for FPGAs

Xilinx Deep Learning IP

Implementations of the Simon and Speck Block Ciphers

Second version of homemade 30 MHz - 6 GHz VNA

Yet Another Forth Core...

FPGA-based HDMI ambient lighting

bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem

VHDL Package for Sublime Text

GBA on FPGA

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

Space Invaders game implemented with VHDL

A FPGA friendly 32 bit RISC-V CPU implementation

Various projects for the Nexys4DDR board from Digilent

A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

A simple RISC-V processor for use in FPGA designs.

VHDL Samples

A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.

A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.

Library of VHDL components that are useful in larger designs.

A List of Free and Open Source Hardware Verification Tools and Frameworks

A list of papers, docs, codes about model quantization. This repo is aimed to provide the info for model quantization research, we are continuously improving the project. Welcome to PR the works (papers, repositories) that are missed by the repo.

VHDL synthesis (based on ghdl)

Open source software for chip reverse engineering.

MEGA65 FPGA core

Original hand-coded firmware for the HDMI2USB - HDMI/DVI Capture - project