549 Open source projects that are alternatives of or similar to K1801

Revengineered ancient PDP-11 CPUs, originals and clones

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i8080 precise replica in Verilog, based on reverse engineering of real die

📚 现代 Web 开发语法基础与工程实践，涵盖 Web 开发基础、前端工程化、应用架构、性能与体验优化、混合开发、React 实践、Vue 实践、WebAssembly 等多方面。

Novel Coronavirus (COVID-19) Cases, provided by JHU CSSE

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一个用于在 macOS 上平滑你的鼠标滚动效果或单独设置滚动方向的小工具, 让你的滚轮爽如触控板 | A lightweight tool used to smooth scrolling and set scroll direction independently for your mouse on macOS

Verilator open-source SystemVerilog simulator and lint system

带二次开发接口的PC微信聊天机器人

The USRP™ Hardware Driver Repository

Verilog Ethernet components for FPGA implementation

[Official] Android reverse engineering tool focused on dynamic instrumentation automation. Powered by Frida. It disassembles dex, analyzes it statically, generates hooks, discovers reflected methods, stores intercepted data and does new things from it. Its aim is to be an all-in-one Android reverse engineering platform.

input/output for many mesh formats

PlatformIO IDE for Atom: The next generation integrated development environment for IoT

PlatformIO IDE for VSCode: The next generation integrated development environment for IoT

Come and join us, we need you!

related to Spartan6 FPGA

GoPlus - The Go+ language for engineering, STEM education, and data science

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These are the lectures, slides, reading assignments, and problem sets for the 'Developing iOS 10 Apps with Swift' CS193p course offered at the Stanford School of Engineering and available on iTunes U.

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HDL libraries and projects

Gmsh for Python

SD card based multi-purpose cartridge for the SNES

谷歌工程实践

😎 All the required resources to build your own startup

YourView is a desktop App in MacOS based on Apple SceneKit. You may use it to view iOS App's view hierarchy 3D.

🦄 Sourcerer app makes a visual profile from your GitHub and git repositories.

CTF 工具集合

Scala based HDL

High performance motor control

A CPU that implementing THCO-MIPS16 instruction set.

😎 Curated list of awesome software for numerical analysis and scientific computing

Transmits AM radio on computers without radio transmitting hardware.

Accumulated knowledge and experience in the field of Data Engineering

a reverse TCP tunnel let you access target behind NAT or firewall

Verilog to Routing -- Open Source CAD Flow for FPGA Research

Preparation links and resources for system design questions

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

KT-Link compatible buffer for the Bus Blaster v3

Golang Restful API Framework for Productivity

An open source GPU based off of the AMD Southern Islands ISA.

A curated list of references for MLOps

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

TensorBase BE is building a high performance, cloud neutral bigdata warehouse for SMEs fully in Rust.

A small, light weight, RISC CPU soft core

This repo is for the 4618 group nember to share code.

Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks

Verilog library for ASIC and FPGA designers

A Just-In-Time Compiler for Verilog from VMware Research

MIPS CPU implemented in Verilog

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SCR1 is a high-quality open-source RISC-V MCU core in Verilog

PlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!