AutoSAAutoSA: Polyhedral-Based Systolic Array Compiler
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ics-adpcmProgrammable multichannel ADPCM decoder for FPGA
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cnn openA hardware implementation of CNN, written by Verilog and synthesized on FPGA
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yosysUnofficial Yosys WebAssembly packages
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captouch👇 Add capacitive touch buttons to any FPGA!
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yafpgatetrisYet Another Tetris on FPGA Implementation
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fasmFPGA Assembly (FASM) Parser and Generator
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Terminal-SetupBest Setup for your terminal for programming on macOS
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keynavishControl the mouse with the keyboard, on Windows.
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FPGA UltrasoundCMU 18545 FPGA project -- Multi-channel ultrasound data acquisition and beamforming system.
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fortran-legacy-toolsThree tools to deal with Fortran code: fixed to free source form converter, upper- to lowercase converter, formatter for variable declarations
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shdl6800shdl6800: A 6800 processor written in SpinalHDL
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spydrnetA flexible framework for analyzing and transforming FPGA netlists. Official repository.
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yahdlA programming language for FPGAs.
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BenEaterVHDLVHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)
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zc pcie dmaDMA attacks over PCI Express based on Xilinx Zynq-7000 series SoC
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stappA Frontend boilerplate for High productivity
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spu32Small Processing Unit 32: A compact RV32I CPU written in Verilog
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xup compute accelerationHands-on experience using the Vitis unified software platform with Xilinx FPGA hardware
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fpga torture🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
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quasiSoCNo-MMU Linux capable RISC-V SoC designed to be useful.
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jiraworklogtoolA simple Chrome Extension that allows adding worklog in Jira easily.
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gateware-tsHardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools
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awesome-engineering-managementPointers and tools for learning and day-to-day practice of engineering management & leadership.
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LvArrayPortable HPC Containers (C++)
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OctavoVerilog FPGA Parts Library. Old Octavo soft-CPU project.
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clash-compucolor2Clash implementation of the Compucolor II home computer
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drec-fpga-introMaterials for "Introduction to FPGA and Verilog" at MIPT DREC
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vhdl-hdmi-outHDMI Out VHDL code for 7-series Xilinx FPGAs
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FFTVisualizerThis project demonstrates DSP capabilities of Terasic DE2-115
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MobileNet-in-FPGAGenerator of verilog description for FPGA MobileNet implementation
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bnn-icestickBinary Neural Network on IceStick FPGA.
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p4fpgaP4-14/16 Bluespec Compiler
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iforgorA simple CLI productivity tool to quickly display the syntax of a desired piece of code
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hBPFhBPF = eBPF in hardware
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xedaCross EDA Abstraction and Automation
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async fifoA dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
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CoyoteFramework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.
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hlscltA Vivado HLS Command Line Helper Tool
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FPGA ThreeLevelStorage【原创,已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计,FPGA三级存储子系统。
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SneakySnakeSneakySnake🐍 is the first and the only pre-alignment filtering algorithm that works efficiently and fast on modern CPU, FPGA, and GPU architectures. It greatly (by more than two orders of magnitude) expedites sequence alignment calculation for both short and long reads. Described in the Bioinformatics (2020) by Alser et al. https://arxiv.org/abs…
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SHA256HasherSHA-256 IP core for ZedBoard (Zynq SoC)
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polyphonyPolyphony is Python based High-Level Synthesis compiler.
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virtioVirtio implementation in SystemVerilog
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TaskbanA personal productivity tool developed with C# and XAML.
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SpinalCryptoSpinalHDL - Cryptography libraries
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build-anywhereScripts for building compilers that run anywhere, which build things that run anywhere
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LVDS-7-to-1-SerializerAn Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.
Stars: ✭ 33 (+37.5%)