All Git Users → The-OpenROAD-Project

8 open source projects by The-OpenROAD-Project

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1. Opensta

OpenSTA engine

✭ 131

2. Replace

RePlAce global placement tool

✭ 109

verilog

3. Openroad

OpenROAD's unified application implementing an RTL-to-GDS Flow

✭ 270

verilog rtl eda

4. OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

✭ 548

Verilog python tcl Dockerfile shell Makefile magic asic rtl verilog vlsi foundry fault yosys klayout caravel netgen system-on-chip openroad openram skywater 130nm soc-design rtl2gds qflow

5. yosys

Logic synthesis and ABC based optimization

✭ 25

logic-synthesis brown-university physical-synthesis

6. TritonSizer

UCSD Sizer for leakage/dynamic power recovery, timing recovery

✭ 13

C++tcl c

7. asap7

No description, website, or topics provided.

✭ 135

HTML SourcePawn Verilog

8. OpenROAD-flow-scripts

OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/

✭ 124

Verilog SourcePawn tcl python Makefile shell eda rtl verilog def gdsii timing-analysis openroad lef opendb-database

1-8 of 8 user projects