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SneakySnake🐍 is the first and the only pre-alignment filtering algorithm that works efficiently and fast on modern CPU, FPGA, and GPU architectures. It greatly (by more than two orders of magnitude) expedites sequence alignment calculation for both short and long reads. Described in the Bioinformatics (2020) by Alser et al. https://arxiv.org/abs…

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VHDL Verilog shell C++Cuda SystemVerilog fpga gpu smith-waterman needleman-wunsch sequence-alignment long-reads minimap2 short-reads hardware-accelerator sequence-aligner edlib pre-alignment-filtering wavefront-alignment

218. Template MiSTer

Template with latest framework for MiSTer

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Verilog SystemVerilog VHDL tcl Batchfile

219. OSXANF

The OSXA repository contains the design files for a NOR flash addon to the original xbox video game console.

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VHDL

220. cnn open

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

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Coq Verilog Jupyter Notebook VHDL tcl shell fpga cnn rtl verilog lenet

221. fft

synthesizable FFT IP block for FPGA designs

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VHDL python matlab shell Makefile

222. satcat5

SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.

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VHDL C++tcl Stata python matlab

223. logi-hard

All Logi specific HDL code (platform specific interface, extension boards, specific hdl, etc)

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VHDL Makefile

224. rfsoc sam

RFSoC Spectrum Analyser Module on PYNQ.

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VHDL tcl python HTML Jupyter Notebook Verilog sdr fft pynq pynq-hardware-overlay fpga-soc spectrum-analyser voila voila-dashboard

225. easyflash

Fork of https://bitbucket.org/skoe/easyflash

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assembly c VHDL Makefile TeX C++commodore-64

226. Arcade-Cave MiSTer

MiSTer arcade core for Cave 68K arcade classics.

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scala Verilog SystemVerilog VHDL tcl shell

227. fast

FAST

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Verilog SystemVerilog VHDL c tcl HTML

228. vhdl prng

Pseudo Random Number Generators as synthesizable VHDL code

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VHDL c C++Makefile

229. blog

Projects published on controlpaths.com and hackster.io

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Jupyter Notebook Verilog tcl VHDL javascript HTML

230. FPGA Ultrasound

CMU 18545 FPGA project -- Multi-channel ultrasound data acquisition and beamforming system.

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Verilog SystemVerilog HTML javascript tcl VHDL fpga data-acquisition ultrasound soc beamforming

231. UnAmiga

Implementation of Amiga 500/1200 in Altera Cyclone IV FPGA

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VHDL c Verilog assembly SystemVerilog Coq verilog-code

232. FFTVisualizer

This project demonstrates DSP capabilities of Terasic DE2-115

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Verilog VHDL HTML matlab tcl fpga dsp fft vga fir-filter de2-115 iir-filter

233. opencpi

Open Component Portability Infrastructure

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Verilog C++VHDL c TeX shell

234. Digilent-Maker

Code that goes with the Digilent Maker Space projects- to share and improve all code here is shared under the Creative Commons 3.0 License.

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c XSLT VHDL scala javascript Verilog

235. Wolf-LITE

DUC-DDC Трансивер Wolf-Lite

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c VHDL Verilog HTML tcl shell

236. dynamatic

No description, website, or topics provided.

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C++VHDL c scala LLVM Makefile

237. tusSAT

A SAT solver implementation in VHDL, team tussle

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VHDL python

238. Pepino

No description, website, or topics provided.

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Verilog tcl VHDL Coq Batchfile python

239. captouch

👇 Add capacitive touch buttons to any FPGA!

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VHDL shell fpga vhdl button keypad capacitive-touch-sensor fomu

240. Atari7800 MiSTer

Atari 7800 for MiSTer

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Verilog SystemVerilog VHDL tcl python Batchfile

241. tinycrypt

Crypto stuff. Don't use.

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VHDL c assembly HTML C++AGS Script

242. Coyote

Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.

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SystemVerilog C++tcl c Verilog VHDL fpga tcp service amd virtualization rdma xilinx-fpga hbm

243. Fibonacci

Fibonacci in as many programming languages as possible (65+ already added!!)

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assembly COBOL LOLCODE VHDL C#Visual Basic .NET

244. snickerdoodle-examples

Example projects for snickerdoodle

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VHDL c Verilog C++

245. Retro-Computers

Retro-Computer Designs (Z80, 65C816, etc)