347 Open source projects that are alternatives of or similar to TinyGarble

Verilog I2C interface for FPGA implementation

使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用

32-bit Superscalar RISC-V CPU

Verilog UART

Repository for the SCALE-MAMBA MPC system

synthesiseable ieee 754 floating point library in verilog

CHIP-8 console on FPGA

Steganography proxy implemented in java

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)

The USRP™ Hardware Driver FPGA Repository

A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals

An open source SPI flash emulator and monitor

Open source design files for the TinyFPGA B-Series boards.

支持 45 条 MIPS 指令的单周期处理器 -- 计算机组成原理实验 NUAA Spring 2017

SystemVerilog parser library fully complient with IEEE 1800-2017

RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance

FPGA,Verilog,Python

New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi standard. Supports DDR and SRD tranfser!

PDP-1 FPGA implementation in Verilog, with CRT, Teletype and Console.

A Verilog HDL model of the MOS 6502 CPU

NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:[email protected]

Must-have verilog systemverilog modules

Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)

Verilog Generator of Neural Net Digit Detector for FPGA

Bus bridges and other odds and ends

open-source IEEE 802.11 WiFi baseband FPGA (chip) design

CNN acceleration on virtex-7 FPGA with verilog HDL

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

A collection of debugging busses developed and presented at zipcpu.com

一步一步写MIPS CPU

Open source implementation of a x86 processor

The Kestrel is a family of home-made computers, built as much as possible on open-source technology, and supporting as much as possible the open-source philosophy.

A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz

A Compiler for the Popr Language

A High-performance Timing Analysis Tool for VLSI Systems

Verilog SDRAM memory controller

Copy/paste anything over the network.

MetroBoy - A playable, circuit-level simulation of an entire Game Boy

Small footprint and configurable PCIe core

Recipe for FPGA cooking

The next generation integrated development environment for processor design and verification. It has multi-hardware language support, open source IP management and easy-to-use rtl simulation toolset.

Hardware implementation of the SHA-256 cryptographic hash function

Notes on the Red Pitaya Open Source Instrument

Open source software for chip reverse engineering.

The Wagtail arm of the law - enforce security protocols on your Wagtail site

SystemVerilog to Verilog conversion

FPGA-based Nintendo Entertainment System Emulator

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

Docker Development Environment for SpinalHDL

SystemVerilog compiler and language services

RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.

Chisel 3: A Modern Hardware Design Language

Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.

BaseJump STL: A Standard Template Library for SystemVerilog

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....

Tools for running FPGA vendor toolchains with Docker

A litecoin scrypt miner implemented with FPGA on-chip memory.

FPGA/hardware design of openwifi