1324 Open source projects that are alternatives of or similar to math

Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.

Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.

A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

A Java program to implement a DMTF Decoder.

This project demonstrates DSP capabilities of Terasic DE2-115

Tools for running FPGA vendor toolchains with Docker

A configurable C++ generator of pipelined Verilog FFT cores

Docker Development Environment for SpinalHDL

SpinalHDL - Cryptography libraries

Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.

An abstraction library for interfacing EDA tools

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

Haskell to VHDL/Verilog/SystemVerilog compiler

A digital signal processing library in Javascript

A reimplementation of a tiny stack CPU

Notes on the Red Pitaya Open Source Instrument

List of ideas for getting started with TimVideos projects

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

Javascript port of Ooura FFT implementation

A FPGA friendly 32 bit RISC-V CPU implementation

A Swift library that uses the Accelerate framework to provide high-performance functions for matrix math, digital signal processing, and image manipulation.

Scala based HDL

Image Processing Toolbox in Verilog using Basys3 FPGA

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

Cross EDA Abstraction and Automation

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.

Materials for "Introduction to FPGA and Verilog" at MIPT DREC

Lattice iCE40: development platform for PlatformIO

Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.

DSP and filtering library

Small Processing Unit 32: A compact RV32I CPU written in Verilog

VHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)

Wishbone controlled I2C controllers

Programmable multichannel ADPCM decoder for FPGA

Virtio implementation in SystemVerilog

An Arduino finite impulse response and infinite impulse response filter library.

This repository contains synthesizable examples which use the PoC-Library.

HDMI Out VHDL code for 7-series Xilinx FPGAs

A DSP toolbox with focus on embedded environments written in Rust.

An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.

Sphinx Extension which generates various types of diagrams from Verilog code.

MOS6581 SID chip emulator in SystemVerilog

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Double precision version of fftpack

Virtual development board for HDL design

FPGA-based JPEG-LS image compressor.

A programming language for FPGAs.

[mmWave based fmcw radar design files] based on AWR1843 chip operating at 76-GHz to 81-GHz.

Generator of verilog description for FPGA MobileNet implementation

A Julia framework for implementing FFTs

PDP-6 Emulator

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

NN on FPGA

Yet Another RISC-V Implementation

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

Digital Signal Processing

Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)

Trying to verify Verilog/VHDL designs with formal methods and tools