911 Open source projects that are alternatives of or similar to tree-core-ide

Quasar 2.0: Chisel equivalent of SweRV-EL2

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

A tiny Open POWER ISA softcore written in VHDL 2008

Documentatin for YatCPU

A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.

Yet another toy CPU.

SweRV EH1 core

RISC-V processor emulator written in Rust+WASM

PlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!

A FPGA friendly 32 bit RISC-V CPU implementation

The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.

SweRV EL2 Core

PlatformIO IDE for Atom: The next generation integrated development environment for IoT

RARS -- RISC-V Assembler and Runtime Simulator

❄️ Visual editor for open FPGA boards

ARV: Asynchronous RISC-V Go High-level Functional Model

The OpenPiton Platform

Chisel Things for OFDM

Chisel 3: A Modern Hardware Design Language

FPGA-based RISC-V CPU+SoC.

FPGA 101 - Workshop materials

Yet Another RISC-V Implementation

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain( chisel, mill, verilator, NEMU, AM and difftest framework, etc) to design and verify.

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....

Lightweight Java wrapper around JQ, a flexible JSON processor available for multiple platforms

CoreFreq is a CPU monitoring software designed for the 64-bits Processors.

A PDF processor written in Go.

Docker Development Environment for SpinalHDL

SST Architectural Simulation Components and Libraries

A simple RISC-V processor for use in FPGA designs.

IDA Pro V850 Processor Module Extension

Android／Java编译时注解处理Demo。用于自动生成工厂代码。

Jest test results processor for generating a summary in HTML

Mixin is a trait/mixin and bytecode weaving framework for Java using ASM

Lily is a modular and lightweight IDE for languages based on Panda Framework

Tools for running FPGA vendor toolchains with Docker

Jest HTML Reporter and Results Processor

Cross-platform process cpu % and memory usage of a PID

Modern CSS to all browsers

A feature rich code block preprocessing tool.

A collection of debugging busses developed and presented at zipcpu.com

Configure multiple loggers and handlers in the blink of an eye

A very small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

Stream analysis for xenon TPCs

🌱 Experimental open FPGA IDE using Atom and Apio

New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi standard. Supports DDR and SRD tranfser!

支持 45 条 MIPS 指令的单周期处理器 -- 计算机组成原理实验 NUAA Spring 2017

Convert Java Types to TypeScript

EVEREST: e-Versatile Research Stick for peoples

AutoPkg recipes all the way from Seattle, WA.

🔬 dd's x86 CPU Identification tool

A Ghidra processor module for the Sega Saturn (SuperH SH-2)

A Forth CPU and System on a Chip, based on the J1, written in VHDL

SDK for Greenwaves Technologies' GAP8 IoT Application Processor

Android REST Data Processor library. Easy to build a REST request, to receive and processing data (XML, JSON, CSV and etc.) from REST requests, file system, assets.

Processes GTK+ CSS into browser CSS

Processor Counter Monitor

Intel Atom C2000 series discovery tool that parses log files and returns results if a positive match is found. #nsacyber

Atom's OneDark inspired theme for Sublime Text