318 Open source projects that are alternatives of or similar to Clio

Docker Development Environment for SpinalHDL

shdl6800: A 6800 processor written in SpinalHDL

A re-creation of a Cosmac ELF computer, Coded in SpinalHDL

SpinalHDL - Cryptography libraries

Spector: An OpenCL FPGA Benchmark Suite

System on Chip toolkit for Amaranth HDL

FPGA-based LPC bus sniffing tool for Lattice iCEstick Evaluation Kit

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

This repository contains synthesizable examples which use the PoC-Library.

Curso de 35h sobre el diseño de sistemas digitales usando FPGAs libres, orientado para makers

Import and export IP-XACT XML register models

AGM bitstream utilities and decoded files from Supra

Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.

OscillatorIMP ecosystem for the digital characterization of ultrastable oscillators and Software Defined Radio (SDR) frontend processing

Wishbone controlled I2C controllers

Hardware-accelerated Multi-threaded IOTA PoW, drop-in replacement for ccurl

EVEREST: e-Versatile Research Stick for peoples

IceChips is a library of all common discrete logic devices in Verilog

zedboard上基于FPGA+ARM的人脸识别智能监控系统。关键词：linux，zedboard，arm，fpga，人脸检测，人脸识别。

A FPGA implementation of the NTP and NTS protocols

The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

Yet Another RISC-V Implementation

Antmicro's fast, vendor-neutral DMA IP in Chisel

mirror of https://git.elphel.com/Elphel/eddr3

NN on FPGA

GPIB IEEE 488.1 core

HW Design: A Functional Approach

A collection of little open source FPGA hobby projects

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

328eForth for Arduino with mods for coinForth

A JSON library implemented in VHDL.

Transient Array Radio Telescope

DDC/DUC SDR Tranceiver project

An open-source VHDL library for FPGA design.

A full-speed device-side USB peripheral core written in Verilog.

FPGA based USB 2.0 high speed audio interface featuring multiple optical ADAT inputs and outputs

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.

Mostly AVR compatible FPGA soft-core

Generic FPGA SDRAM controller, originally made for AS4C4M16SA

FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope

RISCV SoftCPU Contest 2018

Vivado and PetaLinux projects for Zynq EBAZ4205 Board

Real-time binocular stereo vision FPGA system with OV5640 cameras

PandA-bambu public repository

A configurable C++ generator of pipelined Verilog FFT cores

Accelerated Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators

An Open Source configuration of the Arty platform

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

FPGA core for SHA256d mining targeting Lattice iCE40 devices.

Web-based HDL diagramming tool

IIoT-SPYN gives users the ability to control, monitor, capture data, visualize and analyze industrial grade motors

No description or website provided.

No description or website provided.

🌟 Alhambra II FPGA board

Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.

Chisel components for FPGA projects

VT220-compatible console on Cyclone IV EP4CE55F23I7

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.

List of ideas for getting started with TimVideos projects