514 Open source projects that are alternatives of or similar to my_hdmi_device

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

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a low pin count sniffer for icestick

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Universal HDMI/DVI Displays with Touch Panel for Raspberry Pi, BeagleBone, ODROID, UDOO...

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open-source IEEE 802.11 WiFi baseband FPGA (chip) design

FPGA core for SHA256d mining targeting Lattice iCE40 devices.

List of ideas for getting started with TimVideos projects

【原创，已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计，FPGA三级存储子系统。

FPGA/hardware design of openwifi

The USRP™ Hardware Driver Repository

KiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS

mirror of https://git.elphel.com/Elphel/eddr3

Verilog UART

synthesiseable ieee 754 floating point library in verilog

Open source design files for the TinyFPGA B-Series boards.

Verilog I2C interface for FPGA implementation

DDAL(Distributed Data Access Layer) is a simple solution to access database shard.

RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance

SystemVerilog parser library fully complient with IEEE 1800-2017

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

Open source implementation of a x86 processor

一步一步写MIPS CPU

Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA

The Kestrel is a family of home-made computers, built as much as possible on open-source technology, and supporting as much as possible the open-source philosophy.

A High-performance Timing Analysis Tool for VLSI Systems

A Compiler for the Popr Language

A collection of debugging busses developed and presented at zipcpu.com

Verilog SDRAM memory controller

Small footprint and configurable PCIe core

CHIP-8 console on FPGA

MetroBoy - A playable, circuit-level simulation of an entire Game Boy

32-bit Superscalar RISC-V CPU

FPGA,Verilog,Python

Recipe for FPGA cooking

使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用

Hardware implementation of the SHA-256 cryptographic hash function

Power spectrum for RTLSDR dongles.

free5GRAN is an open-source 5G RAN stack. The current version includes a receiver which decodes MIB & SIB1 data. It also acts as a cell scanner. free5GRAN works in SA mode.

Must-have verilog systemverilog modules

A Verilog HDL model of the MOS 6502 CPU

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Open source software for chip reverse engineering.

FPGA-based Nintendo Entertainment System Emulator

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SystemVerilog to Verilog conversion

Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.

RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)

NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:[email protected]

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

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SystemVerilog compiler and language services