BlueoilBring Deep Learning to small devices
Stars: ✭ 244 (-3.94%)
Tf2An Open Source Deep Learning Inference Engine Based on FPGA
Stars: ✭ 113 (-55.51%)
FinnDataflow compiler for QNN inference on FPGAs
Stars: ✭ 284 (+11.81%)
BrevitasBrevitas: quantization-aware training in PyTorch
Stars: ✭ 343 (+35.04%)
e-verestEVEREST: e-Versatile Research Stick for peoples
Stars: ✭ 21 (-91.73%)
HPS2FPGAmappingSoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)
Stars: ✭ 27 (-89.37%)
VGChipsVideo Game custom chips reverse-engineered from silicon
Stars: ✭ 86 (-66.14%)
prjxray-dbProject X-Ray Database: XC7 Series
Stars: ✭ 52 (-79.53%)
phywhispererusbPhyWhisperer-USB: Hardware USB Trigger
Stars: ✭ 56 (-77.95%)
rapcoresRobotic Application Processor
Stars: ✭ 14 (-94.49%)
QNICE-FPGAQNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
Stars: ✭ 51 (-79.92%)
scalehlsA scalable High-Level Synthesis framework on MLIR
Stars: ✭ 62 (-75.59%)
getting-startedList of ideas for getting started with TimVideos projects
Stars: ✭ 50 (-80.31%)
coniferFast inference of Boosted Decision Trees in FPGAs
Stars: ✭ 16 (-93.7%)
zed facezedboard上基于FPGA+ARM的人脸识别智能监控系统。关键词:linux,zedboard,arm,fpga,人脸检测,人脸识别。
Stars: ✭ 38 (-85.04%)
dpllA collection of phase locked loop (PLL) related projects
Stars: ✭ 55 (-78.35%)
wbi2cWishbone controlled I2C controllers
Stars: ✭ 25 (-90.16%)
ixo-usb-jtagusb-jtag - Altera USB Blaster Emulation with a FX2
Stars: ✭ 49 (-80.71%)
PoC-ExamplesThis repository contains synthesizable examples which use the PoC-Library.
Stars: ✭ 27 (-89.37%)
colorquantGo library for color quantization and dithering
Stars: ✭ 75 (-70.47%)
fastvdmaAntmicro's fast, vendor-neutral DMA IP in Chisel
Stars: ✭ 54 (-78.74%)
aaai17-cdqThe implementation of AAAI-17 paper "Collective Deep Quantization of Efficient Cross-modal Retrieval"
Stars: ✭ 33 (-87.01%)
caribouliteCaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR
Stars: ✭ 785 (+209.06%)
Deep-DarkFantasyGlobal Dark Mode for ALL apps on ANY platforms.
Stars: ✭ 16 (-93.7%)
iceskateA low cost FPGA development board for absolute newbies
Stars: ✭ 15 (-94.09%)
PeakRDL-uvmGenerate UVM register model from compiled SystemRDL input
Stars: ✭ 25 (-90.16%)
Speech256An FPGA implementation of a classic 80ies speech synthesizer. Done for the Retro Challenge 2017/10.
Stars: ✭ 51 (-79.92%)
projf-exploreProject F brings FPGAs to life with exciting open-source designs you can build on.
Stars: ✭ 268 (+5.51%)
napsAn experiment for building gateware for the axiom micro / beta using nmigen and yosys
Stars: ✭ 28 (-88.98%)
ClioClio, ASPLOS'22.
Stars: ✭ 37 (-85.43%)
fpga puf🔑 Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
Stars: ✭ 44 (-82.68%)
blarneyHaskell library for hardware description
Stars: ✭ 81 (-68.11%)
quantize🎨 Simple color palette quantization using MMCQ
Stars: ✭ 24 (-90.55%)
shapool-coreFPGA core for SHA256d mining targeting Lattice iCE40 devices.
Stars: ✭ 19 (-92.52%)
Xilinx-ISE-MakefileAn example of how to use the Xilinx ISE toolchain from the command line
Stars: ✭ 50 (-80.31%)
mathUseful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
Stars: ✭ 15 (-94.09%)
rygar-fpgaA FPGA core for the arcade game, Rygar (1986).
Stars: ✭ 17 (-93.31%)
T13xAn Extended Version of the T0x multithreaded cores, with a custom general purpose parametrized SIMD/MIMD vector coprocessor and support for 3-5 way superscalar execution. The core is pin-to-pin compatible with the RISCY cores from PULP
Stars: ✭ 28 (-88.98%)
s6socCMod-S6 SoC
Stars: ✭ 30 (-88.19%)
gemminiBerkeley's Spatial Array Generator
Stars: ✭ 290 (+14.17%)
DFiantDFiant: A Dataflow Hardware Descripition Language
Stars: ✭ 21 (-91.73%)
dblclockfftA configurable C++ generator of pipelined Verilog FFT cores
Stars: ✭ 147 (-42.13%)
evoapproxlibLibrary of approximate arithmetic circuits
Stars: ✭ 23 (-90.94%)
FPGA-USB-DeviceFPGA-based USB-device controller to implement USB-CDC, USB-HID, etc.
Stars: ✭ 29 (-88.58%)
simple-riscvA simple three-stage RISC-V CPU
Stars: ✭ 14 (-94.49%)
pygearsHW Design: A Functional Approach
Stars: ✭ 122 (-51.97%)
1bitSDRMinimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom
Stars: ✭ 53 (-79.13%)
FuxiFuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
Stars: ✭ 68 (-73.23%)
JSON-for-VHDLA JSON library implemented in VHDL.
Stars: ✭ 56 (-77.95%)
psi commonCommon elements for FPGA Design (FIFOs, RAMs, etc.)
Stars: ✭ 13 (-94.88%)
hwtVHDL/Verilog/SystemC code generator, simulator API written in python/c++
Stars: ✭ 145 (-42.91%)
spectorSpector: An OpenCL FPGA Benchmark Suite
Stars: ✭ 38 (-85.04%)