601 Open source projects that are alternatives of or similar to shapool-core

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

Small Processing Unit 32: A compact RV32I CPU written in Verilog

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....

Lattice iCE40: development platform for PlatformIO

A low cost FPGA development board for absolute newbies

CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR

mirror of https://git.elphel.com/Elphel/eddr3

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

Wishbone controlled I2C controllers

A configurable C++ generator of pipelined Verilog FFT cores

Programmable multichannel ADPCM decoder for FPGA

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

Notes on the Red Pitaya Open Source Instrument

32-bit Superscalar RISC-V CPU

New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi standard. Supports DDR and SRD tranfser!

Must-have verilog systemverilog modules

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.

Cross EDA Abstraction and Automation

iCE40 floorplan viewer

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

A collection of little open source FPGA hobby projects

MOS6581 SID chip emulator in SystemVerilog

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Upduino v2 with the ice40 up5k FPGA demos

Generator of verilog description for FPGA MobileNet implementation

FPGA-based JPEG-LS image compressor.

FPGA-based LPC bus sniffing tool for Lattice iCEstick Evaluation Kit

Verilog Generator of Neural Net Digit Detector for FPGA

CNN acceleration on virtex-7 FPGA with verilog HDL

FPGA/hardware design of openwifi

Docker Development Environment for SpinalHDL

Tools for running FPGA vendor toolchains with Docker

Bus bridges and other odds and ends

Yet Another Tetris on FPGA Implementation

【原创，已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计，FPGA三级存储子系统。

A programming language for FPGAs.

SHA-256 IP core for ZedBoard (Zynq SoC)

Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.

Materials for "Introduction to FPGA and Verilog" at MIPT DREC

CHIP-8 console on FPGA

Yet Another RISC-V Implementation

A full-speed device-side USB peripheral core written in Verilog.

Sphinx Extension which generates various types of diagrams from Verilog code.

An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

IceChips is a library of all common discrete logic devices in Verilog

Drop In USB CDC ACM core for iCE40 FPGA

SpinalHDL - Cryptography libraries

PDP-6 Emulator

Virtio implementation in SystemVerilog

NN on FPGA

FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope

Low-cost ECP5 FPGA development board

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

Recipe for FPGA cooking

Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools

Dockerized FPGA toolchain experiments

Mostly AVR compatible FPGA soft-core